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I think there is a teapot behind the sun!
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The iostandard of gpio_ctl of ad9361 shall follow the VDD_INTERFACE ,which should be 1.8v in your design.
But in the system.xdc of your design , the iostandard is as follows:
"+set_property IOSTAN…
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When I used the makefile in `fpga` subdir, I got an error.
```sh
➜ fpga git:(main) make build
rm -rf /home/zfl/workspace/AnTiQ/fpga/build /home/zfl/workspace/AnTiQ/fpga/reports/240116_194056_ut…
zflcs updated
7 months ago
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Hi @jack-h ,
I'm working on v6.3 on the KRM board, and looking at the frequency response of a tone as I sweep the mixer frequency, and cross over to the next channel.
I'm using `r.set_multi_tone…
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I have tried to find pictures of ITS machines. I haven't found much.