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**Please DO NOT start working on tasks from this list on your own.** These tasks are very complex, have far-reaching consequences, and require subtle API design. In most cases, I (@whitequark) have a …
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Upstream:
https://github.com/antonblanchard/vlsiffra
Hard-Dependencies:
yosys (but can use https://github.com/amaranth-lang/amaranth-yosys)
Soft-Dependencies:
- OpenROAD
- [ORFS](https://git…
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Hi! Thanks again for these lovely examples.
The ICE40 PLL example, by creating a clock domain, disables the ICE40Platform workaround for the BRAM startup erratum. Upstream does *not* consider this …
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```
Traceback (most recent call last):
File "tb_smolcpu.py", line 28, in
sim = Simulator(dut)
File "/home/matt/.local/lib/python3.8/site-packages/amaranth/sim/core.py", line 68, in __init…
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In below files, nmigen should be replaced by amaranth, right?
CFU-Playground/proj/proj_template/cfu_gen.py
CFU-Playground/proj/proj_template/cfu.py
Whether nmigen_cfu should be replaced by amaran…
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Thank for your effort and keeping this repo up to date, I get several warning when using code from the repo and I am not sure how to use it anymore.
How do I run the blinky test?
I now do the follo…
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### What is your idea about?
It's a pretty dark sign, so it would be cool if its default text color was lighter, like with the dark oak signs
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The two mechanisms are similar conceptually and mainly differ syntactically. The following command can illustrate the changes required:
```console
$ git diff 38730032..e9571705 -- glasgow/applet/i…
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### Version
Yosys 0.40+25 (git sha1 171577f90, sccache x86_64-w64-mingw32-g++ 13.2.0 -Os)
### On which OS did this happen?
Windows
### Reproduction Steps
1. Save this file as `bad.rtlil`:
``…
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Similiar to #373 platform.add_clock_constraint does not work for instances in lattice diamond.
However, the same fix does not seem to be applicable. Do you have any ideas what is going wrong?
repr…