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This is a proposal for discussion.
The idea is to switch the linter from Verilator to Veriable.
https://github.com/chipsalliance/verible
Rationale
In addition to a command line lint, Verible…
zapta updated
3 months ago
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There are a number of other projects to distribute tooling;
* Conda - used by LiteX-BuildEnv - https://github.com/timvideos/conda-hdmi2usb-packages
* Apio - used by icestudio - https://github.com/…
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Any chance of building this on a RPi Zero? Looks like apio doesn't support linux_armv6l.
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I would like to use icestudio in class e.g. to demonstrate the simulation of logic gates. Ultimatively I would like to create logic tables with the students.
I found following two descriptions but …
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To use litex and vexRiscv there are various build tools required.
The aim for this repo is to build all the required tools into one or more containers to allow quicker build and automated testing o…
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Hey I like your triSwitch and I think it should be published in bower!
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Hi!
I am trying out apio to see if it works on the raspberry pi zero with the icezero
https://blackmesalabs.wordpress.com/2017/02/07/icezero-fpga-board-for-rasppi/
https://shop.trenz-electro…
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Very convenient detection tool! Can you consider adding Chinese language option? Thanks!
If possible, I would like to make Chinese materials for related icons and logos.
![image](https://github.com/…
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Hi, Angelo
After verification in Icestudio i get this in command output:
iverilog -o hardware.out -D VCD_OUTPUT= -D NO_INCLUDES "C:\Users\n\AppData\Roaming\SPB_Data\.icestudio\apio\packages\tool…
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The following lines of code cause the system to not build. The verification works.
>function integer log2;
>input integer v;
>begin
>log2=0;
>while(v>>log2) begin
>log2=log2+1;
>end end
>e…