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The current emulator code has been written with Win64 in mind however current testing is being performed on macOS, Linux and FreeBSD. There are some sections of code that need to be abstracted.
The P…
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We determined to port a complete runtime environment including OpenJDK11 + OpenJ9 + OMR (without JIT) to the RISC-V development board (e.g. HiFive Unleashed with Linux support / please refer to https:…
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When trying to follow the quickstart guide as in: https://riscof.readthedocs.io/en/stable/installation.html# the riscof run command at the very end fails.
I'm running on ubuntu a arm machine.
ri…
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Hi!
I have a question about compiling programs for 32-bit cores. I tried to use Verilator to test Bare Metal RISC-V Programs with TinyCore( Is it 32-bit core, right?). First of all, I make TinyRoc…
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### Describe the problem
I am evaluating the possibility of using Tauri to build desktop applications for the RISC-V platform. I would like to know if Tauri currently supports the RISC-V architecture…
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**_chipyard release: 1.4.0_**
Hello,
I am running the following command to build the simulator:
```
make CONFIG=L1ScratchpadRocketConfig
```
then executing an `rv64ui-p-add` test on the built …
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in src/cpu.c ( lines 609-614 ) we have :
```
case ADDSUB:
switch (funct7) {
case ADD: exec_ADD(cpu, inst);
case SUB: exec_ADD(c…
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I tring to write riscv linux emulator in rust.
I have enum Instruction with 203 values.
For small enums (< 128 values) rustc generates optimized code.
['Small' enum on compiler explorer](https://…
mjdr updated
10 months ago
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I have tried to set PATH to `linux_for_riscv_em/output_mmu_rv32/buildroot/output/host/bin/`, I built the Linux kernel and it runs successfully in your emulator.
I think buildroot has built the tool…
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Most of configurations in RC is untested. Making RC almost impossible to accept RTL changes to new RV extension from community.
0. Currently Makefile-based testing decoupled Chisel elaboration, FI…