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I am having a problem with the div module you are using.
-15 / -4 = -1 but it should be 3
15 / 4 = 3 which is true
-15 / 4 = 1 but it should be -3
15 / -4 = -3 which is true
2 out of 4 cases…
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Hello Alex, first of all I would like to thank you for sharing your code, I'm already using your verilog-ethernet library on which I've implemented a Ethernet RAW reader/writer for a device I'm workin…
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Hi, on ubuntu 18.04 main.py raises an ecxception when doing VERIFY on the FPGA.
It turned out that modifying
self.ssh.connect(IP, port=PORT, username=USER, password=PWD)
into
self.ssh.connec…
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Greetings, thanks for the great project.
I am porting the project onto an ebaz4205 ZYNQ 7010 board and nearly everything is now working, however there is a problem with the sawtooth sound module wh…
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Greetings Andres, I am having a go at running your terminal. Limited results so far as I have only a flashing led and cursor on the VGA output but no sensible results when I connect the USB. I can't t…
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Hi again,
I'm considering to evaluate PandaCam in a cheaper ov5640 compatible FPGA development board (like the EBAZ4205 for 10€) with zynq7010 fpga version but get just one resource problem, the Bram…
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I have just run the microwatt with fusesoc on arty_a7-35. Then, I open the microwatt_0.xpr in vivado gui mode. I found that there are critical warning about the timing. It said that the design failed …
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I have a custom board with a Zynq 7010 (XC7Z010-1CLG225I). There is a 16MiB NOR Flash (ISSI IS25WP128) connected to QSPI controller.
When powered on with boot mode set to QSPI, the FSBL will run a…
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hi,
I have configured the docker-based model quantization tool (CPU version). However, I encountered the following problems when I use the Vitis AI Compiler tools.
The commond 'vai_c_tensorflow' nee…
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If I can correctly interpret the pics, the external crystal is at 25MHz, is this correct? Does the FPGA run at this frequency?