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A number of the plugins in this repository are not FPGA specific (plugins like SystemVerilog support using UHDM, SDC support, and design inspection), this makes the "f4pga" in the name a bit confusing…
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Hi
When i try to test the example counter_test of X-ray project inside the board Artix7 35tcsg324-1 i have the following error
-- Parsing `counter.v' using frontend ` -vlog2k' --
ERROR: Can't open…
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It appears we don't have any examples / demos which run on Zynq parts at the moment?
I don't know which board should be targeted?
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There are a bunch of things which need to be applied to all the submodules of the gf180mcu-pdk. We should set up a robot which makes sure these files are kept in sync and deployed.
For the F4PGA pr…
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I don't see any documentation on how to perform a local install (i.e. under `/usr/local`).
If I run `make`, most of the sub-builds succeed generating `.so` files, although I get this error (@hzelle…
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I think it would be good to mention the possibility to use GHDL as plugin for Yosys as a second, open-source way to use VHDL as RTL language. Would be some additions in the RST and the toolchain-flow.…
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I designed my own CFU to accelate FFT.
However, after `make prog` step was finished successfully, my terminal got stuck somewhere in `make load`.
```
make[3]: Leaving directory '/home/limx/CFU-Play…
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There are fuzzers `100-dsp-mskpat` and `101-dsp-pips` that target Xilinx 7-series DSP tiles. They should already provide solution for all routing and most of DSP configuration bits. There is an open q…
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The self-hosted runners were down for the last couple of days and has only now gotten back up. I wanted to investigate any anomolies in the logs of the CIs to see if we have any issues in the testcase…
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hi, I found your repos contains [segbits_riob18.db;](https://github.com/kazkojima/db-workspace-for-kintex7/blob/cada09e183052525b5382757e31121bbbedffc0a/segbits_riob18.db) The fuzzers in prjxray can't…