-
"If we look at the generated Fomu header files, we can see many, many memory-mapped registers. For example, the major, minor, and revision numbers all have registers:"
This fragment refers to such …
-
Hello,
i've searched the Aliexpress for absolute cheapest FPGA boards and i've found very cheap devices that i think might be worth supporting:
- Noname chinese bargain FPGAs
- https://hackaday…
-
The design runs in a single clock domain, driven by `clki`. This pin is a 48 MHz signal, and as a result the entire design actually runs at 48 MHz.
As a result, the system is overclocked and can fa…
-
Hi!
As @edbordin mentioned when I logged a bunch of issues around adding things like support for Xilinx and QuickLogic toolchains, it is a lot of work to keep things building and moving forward. To…
-
Currently the Makefile checks for an active TTY. Sometimes this happens too early. For example, with Fomu, the /dev/ttyACM0 terminal doesn't appear until after the gateware and firmware are flashe…
-
Using GHDL as a frontend for Yosys allows synthesising VHDL, Verilog and/or mixed language designs. See https://im-tomu.github.io/fomu-workshop/mixed-hdl.html. It'd be interesting to test whether this…
-
Related to #326, #336, #320 #317
check list for adding new dcd API to close an endpoint. This API is needed for supporting
- multiple configuration and
- Alternate Interface.
Although the…
-
The handshaking on the USB CDC port doesn't work correctly, so when lots of characters are copied / pasted to the terminal at once, then some get lost in the process and don't get echoed.
Reproduci…
-
It would be good to support / have the same style of [board metadata that the TinyFPGA board does](https://github.com/tinyfpga/TinyFPGA-Bootloader#fpga-board-metadata).
See below;
> ## FPGA Boa…
-
Due to a (probable) bug in Chrome OS USB device handling, there is a crossvm state machine issue that prevents the fomu serial console from being usable after DFU flashing the micropython demo binary.…