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Hello, i tried to the following freeRTOS hello world application using Zynq Ultra Scale 96 v1 and microblaze.
On windows the example worked as expected, then i installed ubuntu using virtualbox and t…
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Hi
I deployed SW-FB with DPDK 18.11 on a VM on virtual box 6.1.2 that running ubuntu server 18.04 and pktgen 3.7.1 on another machine with same OS and DPDK version. When i run elephant usecase it wor…
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We need a newer compiler than petalinux provides. We have built our own toolchains for aarch64-elf, microblaze-elf and aarch64-linux-gnu with the vendor-part of toolchain tuple set. We use these toolc…
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```
What steps will reproduce the problem?
1. Flash driver has Intel confidentional header
2. Printf function
3. Linux list
4. Microblaze msr.h "code from u-boot (modified)"
What is the expected outp…
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hello,看了您的代码和论文,想用在zynq 系列芯片上。
主要问题是 zynq 系列芯片,xdma 的h2c/c2h通道数每个方向只有2个。
想了解一下,修改dma 通道数,是否好修改。
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Go through as much qemu targest you can, try to build linux distro fot it using differen targets.
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The target_lock() implementation in altera-c5socarm/lock-dualprocnoos.c is broken on SMP systems. For a primitive SMP lock, see:
https://en.wikipedia.org/wiki/Test_and_test-and-set
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Create data can generate invaild versions of IPs. This is more likely when the IP has a lot of configuration options, like microblaze. There seems to be no error checking to catch this. The checkpoint…
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I have looked at the source code of the xrt driver, and its power-up sequence is roughly as follows:
(1)mgmtpf/userpf initialization, create/probe sub device separately
when userpf‘s all sub d…
crizy updated
11 months ago
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Hello, we bought your FPGA Drive module and clone repo with project for Vivado 2018.2, but when I try to boot petalinux on vc707, I can't see any console logs. I've already see this issue https://gith…