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https://www.reddit.com/r/sumokoin/comments/83w61w/regarding_cryptonight_asics/
will you update your version of xmrig with the upcoming fork where Monero and Sumokoin are going to update the algorithm…
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#### Description
Although the device says that drop counter IS NOT supported on this device, I see that drop counters do increment.
```
admin@ixre-egl-board71:~$ show dropcounters capabilitie…
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Hello,
I'm a hardware design engineer, and the part in the schematic of the bypass caps for the internals voltages domains makes absolutely no sense electrically speaking.
Do you have documentation…
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Hi,
To my understanding, this repo is now currently only for FPGA implementation, so I wonder if your team plans to target any ASIC implementation in the near future? Or do you know of any finished…
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#### Description
We are using multi-asic chassis (Nokia-7250) to test telemetry. It is found if I provide the following CLI from ptf server without providing namespace information, GNMI container cra…
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Hello everyone!
I wish to actively contribute to the growth of the Alephium community by creating a new public mining pool where other miners can connect and mine together. I would like to ask for …
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**Issue by [whitequark](https://github.com/whitequark)**
_Thursday Aug 22, 2019 at 21:49 GMT_
_Originally opened as https://github.com/m-labs/nmigen/issues/184_
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A number of people have express…
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#### Description
GCU Field validation for interface fields fec and speed is not properly done with as a result to result with not-allowed configuartion.
The check is applied in CLI command…
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**Goals**
- [x] extract S-curve on Pixel 0 with max stat and cardboard and see and document the impact
- [x] probe dnn and dnn
- [ ]- ideally get a hold on a new scope with 4 working chan…
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What is the estimated speedup of the design as an ASIC, given smaller feature sizes and hence higher clock speeds? Could this possibly be 10x?
Further, I notice that the number of clk/sq for pearso…