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Hi all,
I modified the hello_world model to perform a single MatMul operation instead of the Conv2d/Relu operations, and i'm unable to make it run on the NPU.
The code is mostly the same, the ch…
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I am trying to build models with multiple inputs and multiple outputs. A small example is created as below:
```
class Net(nn.Module):
def __init__(self):
nn.Module.__init__(self)
…
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Hi,
I tried all these three branches of this repository to build an image for Xilinx zcu106 board:
mathworks_zynq_R22.1.0
mathworks_zynq_R20.2.1
mathworks_zynq_R19.2.1
I created the folder/…
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I've been experiencing a problem when trying to receive SPI data in interrupt mode. More precisely, if the SPI clock frequency is not "fast enough", the last byte coming from the counterpart SPI devic…
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I am trying to create a way that my software test can notify the simulator for the Programmable Logic (in my case I use QuestaSim) that it has passed or failed the test.
I notice that the reserved …
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# Clusterless decoding requires both software and FPGA update
## 1. It requires much more VQ for each electrode groups
These VQs are automatically genearted in clusterless decoding. `kmeans` can b…
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```
ERROR: [CFGEN 83-2291] --sc tag applied with invalid slave kernel instance: batchNorm_1
ERROR: [CFGEN 83-2291] --sc tag applied with invalid master kernel instance: batchNorm_1
ERROR: [CFGEN 83…
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Hi Merlin compiler Team,
I have succeeded to build merlincc. Then I tried to build some code but I got failures as below.
Can someone support to figure out what I have wrong in configurations?
ad…
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I am trying to deploy an unet generative neural network on the ZCU102 development board and the quantization result error is very small.But during deployment, almost a completely incorrect output was …
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Hi,
I have successfully built the vck190_bare_prod and tried to run executables. However, something is broken.
First, the host.exe file present in the freshly built SD card image for [the Vitis…