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Xilinx
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mlir-aie
An MLIR-based toolchain for AMD AI Engine-enabled devices.
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Could not run Programming Examples on HX 370
#1946
ngdymx
opened
20 hours ago
0
Fix topological sort use
#1945
keryell
opened
1 day ago
1
Make ModelProperties private member of AIETargetModel
#1944
erwei-xilinx
closed
1 day ago
0
[WIP] Ignore me
#1943
hunhoffe
opened
4 days ago
0
update simulator version check
#1942
fifield
closed
3 days ago
0
Rename `TensorTile` to `TensorAccessPattern`
#1941
hunhoffe
closed
4 days ago
0
Use CDO path not ELF path to initialize buffers
#1940
jgmelber
closed
4 days ago
1
Programming Guide Small error fixes
#1939
sezgin1947
opened
6 days ago
0
Make RTP's atomic by generating a lock and changing it's state in the runtime_sequence
#1938
jgmelber
opened
6 days ago
1
Move hardcoded MemTile offsets for buffers and locks from AIERT.cpp to TargetModel
#1937
jgmelber
opened
6 days ago
0
Change aie.device op from NoTerminator to SingleBlockImplicitTerminator
#1936
fifield
closed
3 days ago
1
Are there any larger-scale examples that can run on the VCK190?
#1935
micropuma
closed
6 days ago
2
Optimize dynamic objectFifo for ping-pong buffers
#1934
pvasireddy-amd
opened
1 week ago
2
Object FIFO: fix DMA channel detection
#1933
AndraBisca
closed
6 days ago
1
update llvm to 0611a668
#1932
fifield
closed
1 week ago
0
Update README with instructions to activate IRON env
#1931
AndraBisca
closed
1 week ago
0
Fix broken link in programming guide section 2
#1930
AndraBisca
closed
1 week ago
0
Add `hasProperty` method to targetModel
#1929
erwei-xilinx
closed
4 days ago
3
Link to tutorial doesn't work
#1928
AJ-RR
closed
1 week ago
1
Access buffer from adjacent memtile's DMA
#1927
AndraBisca
closed
1 week ago
1
[TEST] Test case to access buffer from adjacent memtile
#1926
pvasireddy-amd
closed
1 week ago
2
Fix typo in lit file for mat mul whole array test
#1925
hunhoffe
closed
1 week ago
0
Mat mul whole array implementation using tiler helper tools
#1924
hunhoffe
closed
6 days ago
0
Add python documentation to TensorTiler source code
#1923
hunhoffe
opened
1 week ago
0
Choose `dimensions` or `sizes` + `strides` for user-facing operations
#1922
hunhoffe
opened
1 week ago
2
`aie.dma_bd` (DMABDOp) parsing of optional attributes is fragile/buggy
#1921
hunhoffe
opened
1 week ago
0
Add tracing support for Conv2D example
#1920
asyms
closed
1 week ago
3
`dma_task` in programming examples
#1919
hunhoffe
closed
4 days ago
9
Missing info on the README on how to activate IRON Env
#1918
TizianoDeMatteis
closed
1 week ago
1
Fix memtile_dma check
#1917
AndraBisca
closed
1 week ago
1
Update test/npu-xrt makefile-common
#1916
AndraBisca
closed
2 weeks ago
0
Remove CallableOpInterface from MemOp and MemTileOp
#1915
fifield
closed
2 weeks ago
0
Cleanup extra code in headers
#1914
fifield
closed
2 weeks ago
1
[WIP][CIR] Single-source C++ lowering with ClangIR MLIR CIR
#1913
keryell
opened
2 weeks ago
0
Bump llvm
#1912
erwei-xilinx
closed
2 weeks ago
0
Add llvm rtti support in AIETargetModel
#1911
fifield
closed
1 week ago
1
Programming Example with IPython Notebook
#1909
hunhoffe
closed
1 week ago
6
Enable one of the npu-xrt/e2e tests
#1908
hunhoffe
closed
1 week ago
0
[TEST] Adding flag to run command
#1907
pvasireddy-amd
opened
3 weeks ago
1
Speed up quick setup script
#1906
jgmelber
closed
2 weeks ago
0
Peano failed to compile AIE cc kernel but xchesscc_wrapper succeeded
#1905
chhzh123
closed
1 week ago
1
update llvm
#1904
fifield
closed
3 weeks ago
0
Build issue in tutorial2-a
#1903
kimm240
closed
1 week ago
5
How many PLIOs are available from PL to AIE for VCK190 board ?
#1902
Albresky
closed
6 days ago
3
Make pre-allocated buffers work again
#1901
fifield
closed
2 weeks ago
2
Fully open-source AIE flow
#1900
jgmelber
closed
3 weeks ago
2
Reduce duplicate global data in aie-dma-to-npu pass
#1899
fifield
closed
3 weeks ago
0
Don't generate configuration from elfs if elf path wasn't provided
#1898
fifield
closed
3 weeks ago
1
Add trace check to chess lit for mm single
#1897
jgmelber
closed
3 weeks ago
0
Fix trace for mm. Change default to vec and trace on.
#1896
jackl-xilinx
closed
3 weeks ago
0
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