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https://github.com/enjoy-digital/litex/commit/fb0c9e846d72fc4fe99ca329cc84a8d2537d3d8d
This seems to break building even simple SoCs or just block programs on ECP5:
for example just trying to buil…
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*(This first comment will be updated as the porting efforts evolve and will summarize results so that others can benefit from it.)*
Hi @alexforencich and all,
First off, congrats for an impr…
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when I run this command sudo apt-get install libncurses5 libncursesw-dev, the error message displayed is Reading package lists... Done
Building dependency tree
Reading state information... Do…
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When I run `make` for LiteOS (after fixing some errors I got from unescaped "" in a printf statement) I get this error:
`ar cq libliteos.a lite_oled.o lite_fb.o lite_elf.o lite_stdio.o imgui.o imgu…
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This test is failing on both FPGA and verilator models:
```
cargo test -p caliptra-test --release --features=fpga_realtime warm_reset_basic -- --nocapture
test warm_reset_basic ... 0 ne…
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Hello,
My goal is to run replicate the progress made with hosting Buildroot/Debian/Fedora onto an FPGA but with Ubuntu instead.
Is there any support planned for Ubuntu RISC-V ports instead of Bu…
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> make: Verzeichnis „/home/oj/fpga/build/sim/software/libc“ wird betreten
> if [ -d "/home/oj/fpga/litex/litex/soc/software/libc/riscv" ]; then \
> cp /home/oj/fpga/litex/litex/soc/software/libc/ri…
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When I try to run ```python3 OrangeCrab-bitstream.py``` on Ubuntu 22.04 I get this error:
```INFO:SoC:--------------------------------------------------------------------------------
INFO:SoCBusH…
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Hi, nice work by the way and I'd love to use what you have here. I'm trying to use the ISL79987 and have the full datasheet from Renesas. So far I've configured the chip and I can see data on the MIPI…
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I have built the Custom Linux image using followed the steps :
```
git clone https://github.com/linux4microchip/buildroot-external-microchip.git -b 2022.02-mchp
git clone https://git.busybox.net/bu…