-
when following README instructions to drive the simulation with gem5:
https://github.com/antmicro/xls-cosimulation-demonstrator?tab=readme-ov-file#run-gem5
it currently hangs on:
```
xls-cosimulation-…
-
**Type of issue**: feature request | question
**Impact**: rtl refactoring | new rtl | unknown
**Development Phase**: request
BOOM currently does not support a 32-bit FPU and thus s…
-
```
__attribute__((noipa))
void test(long long expr, long long *llp) {
*llp = expr >> *llp;
}
int main(void) {
long long lgot = 1;
test(1LL
-
I am getting following error in "make run-emulator"
verilator --cc --exe --top-module Top +define+PRINTF_COND=1 --assert --output-split 20000 --x-assign unique -I/home/farhad/Downloads/riscv-sodor…
-
My plan was quickly build RV32 for linux, test different cache features, and study how to write a board for Arria 10 board.
Without any good knowledge of the process, I just copy pasted commands ha…
-
# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|linux: RVA23U64 profile lp64d medlow multilib |1/1|0/0|0/0|[55024148694bc5ccf4f5c727e7ba645fd0cc7b38](https://github.com…
-
用Android ijkplayer的,我配置如下
ijkMediaPlayer.setOption(IjkMediaPlayer.OPT_CATEGORY_PLAYER, "mediacodec", 0);
ijkMediaPlayer.setOption(IjkMediaPlayer.OPT_CATEGORY_PLAYER, "mediaco…
-
## Issue
It recently came up in the RISC-V meeting that the bitfield syntax is limited when we want bitfields with fields that can vary in width depending on XLEN, or the virtual memory translation…
-
NEMU貌似没有为riscv32e单独配置一个完整的环境
1. nemu缺少`configs/riscv32e-am_defconfig`
2. menuconfig配置RVE选项,编译结果依然为`riscv32-nemu-interpreter`,在riscv32e情况下会使`am-kernels/kernels/nemu`编译出`riscv32-nemu-interpreter-ris…
-
When running just the F extension for RV64, I thought that it should also pick up the RV32/F tests. All it does is runt he test cases in RV64i_m/F dir.
Am I missing something?
riscof run --con…