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On Foundation model version 0.8.5206, using the Linaro-EDK2 2014.08 release, the model fails to boot into UEFI without any feedback in the console.
git bisect reveals a1b6db6c62aa ("fvp: Reuse BL1 an…
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hi, experts:
In firmware-design.md doc:
5. Secure-EL1 Payloads and Dispatchers
This service is responsible for the initialisation of the Trusted OS and all communications with it.
......
So, how to …
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BL31 in bl31_prepare_next_image_entry uses cm_set_el3_eret_context to configure registers.
However it does not configure scr to match non-secure RW to 64 bit, in case SP has already been initialized a…
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In [`bl2_main()`](https://github.com/ARM-software/arm-trusted-firmware/blob/for-v0.4/bl2/bl2_main.c#L171) the value zero is passed to BL3-1 in X1, which contradicts the specification in #133 which sta…
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Scanning through fip_create.c, there is an entry in the `toc_entry_lookup_list` referred to as `SCP Firmware BL3-0`. It is not documented anywhere - what is it intended to be?
Also, minor note, the c…
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'make help' triggers dependency checking whereas it shouldn't:
```
$ make help
DEPS build/fvp/release/bl31/bl31.ld.d
DEPS build/fvp/release/bl31/sysreg_helpers.d
DEPS build/fvp/release…
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There are a significant number of variables that are declared and initialised as non-const - when they could either be uninitialised (zero init) or should be const. This will place them in .bss or .ro…
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I know this is a long entry - but I wanted to capture most of the related requirements, some proposed specification and some commentary on what happens on the FVP. Please provide some feedback if this…
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When booting through bl31 I get the following error emitted from the Linux kernel:
GIC CPU mask not found - kernel will fail to boot.
When I examine the GICD_ITARGETSR array from bl31 all the value…
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Both the BL2 and BL32 will run in the S-EL1 and both of them will configure the MMU while initialising.
After the BL2 completes, the control right will be given to BL31 via the BL1's exception handl…