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The engine loop (consisting of both Physics and Rendering) is a fair bit slower than I'd expect with the hardware it runs on, often fully maxing out a CPU core with a decent simulation; I suspect ther…
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This may be too esoteric to be useful and can be closed if so, but just in case it applies to other situations, here's what I'm seeing. Isolated below. Compiling with -Os
```c
#include
#defi…
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Discussion opener is the link below, an issue I came across again this morning and I think it's be fairly simple to add some co figurable delay so people can flag up if they expect the hardware to sta…
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| | |
|--------------------|----|
| Bugzilla Link | [PR34125](https://bugs.llvm.org/show_bug.cgi?id=34125) |
| Status | NEW |
| Importance | P enhancemen…
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## Describe the bug
Following variables are unused and can be removed.
`frm_obs` in lambda `thread_right`
https://github.com/stella-cv/stella_vslam/blob/a404f57c1999d8e29475b490e5fe26c38469df53/s…
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### Basic Infos
#### Hardware
**WiFimanager Branch/Release:**
- [ ] Master
- [x] Development 0.15-beta
**Esp8266/Esp32:**
- [x] ESP8266
- [ ] ESP32
**Hardware: ESP-12e, esp01, esp25**
…
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Using the implementation of `PLACE_IN_FRAM` defined at #31, compiling against the MSP430FR2433 raises an error.
+ Boards package MSP430 1.0.3
+ Energia 1.8.5E19.
>"/Users/ReiVilo/Library/Energ…
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| | |
|--------------------|----|
| Bugzilla Link | [PR15527](https://bugs.llvm.org/show_bug.cgi?id=15527) |
| Status | NEW |
| Importance | P enhancemen…
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| | |
|--------------------|----|
| Bugzilla Link | [PR23743](https://bugs.llvm.org/show_bug.cgi?id=23743) |
| Status | NEW |
| Importance | P normal |
|…
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## Background
Related to https://github.com/chipsalliance/caliptra-rtl/issues/399
The fix for that logic issue was:
- SRAM must be initialized/zeroized at time 0 by the SoC - integrator responsib…