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### Description
Typical SDC scripts uses option [set_dont_touch] to avoid the manually inserted cells get modified through flow.
When i try the command in SDC the Openlane resizer stage fails with…
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# Upstream
https://github.com/The-OpenROAD-Project/OpenLane/
# License
https://github.com/The-OpenROAD-Project/OpenLane/blob/master/LICENSE
# Dependencies
- OpenROAD
- netgen
- open_pdks (o…
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### Description
I'm not sure what's supposed to be included in the `issue_reproducible`, but while filing https://github.com/The-OpenROAD-Project/OpenROAD/issues/2758 I attached the `issue_reproducib…
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### Prompt
OpenROAD has had an experimental feature to `write_liberty` for a while. The values reportedly aren't that accurate but we feel like generating a basic lib file for things like synthesis h…
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### Prompt
I am not an expert with OpenROAD's code-base, and I would like to seek advice.
I am experimenting with the procedural generation of up to 10^64 variants of the same sub-design.
This su…
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## Description
FP_IO_VLENGTH & FP_IO_HLENGTH don't work for setting less than 4
## Expected behavior
be able to set less than 4
## Environment
```
Kernel: Linux v5.15.0-48-generic
D…
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Hello,
I am trying to harden a configurable logic block for the new MPW-8 from efabless but I get the following error. It is strange because this error does not appear with the previous version of Op…
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### Describe the bug
During detailed routing, pins on my custom cell cannot be accessed and I'm unsure why. For example, I get errors like this:
```
[WARNING DRT-6000] Macro pin has more than 1…
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**Describe the bug**
The flow fails for this BlackParrot front-end design ([bp_fe](https://github.com/bsg-idea/bsg_sky130_designs/tree/test_sky130/designs)) at the Global Routing step with "Routing c…
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I am trying to run OpenLane flow for digital PFD with verilog code
getting the below error
[ERROR]: 'OL_INSTALL_DIR'
The version of magic used in building the PDK does not match the version Op…