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Hi,
When I was trying to simulate mor1kx with modelsim, the execution flow always somehow "halted" after around 4700 instructions executed if I enabled DCache and ICache in mor1kx.v. The cache work…
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For RISCV and Xtensa, it is possible to debug multiple cores (unsure about how ARM works, if anyone can fill this information in that would be great), however, they work in different ways. In Xtensa, …
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Very low priority since there are no firmwares out yet.
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MicroSOM: A388 SoM
CPU: Dual core ARM Cortex-A9 up to 1.6GHz
GPU: N/A
Memory: 32-bit DDR3L 1GB (up to 2GB)
Features:
2 x mSATA/mPCIE
1 x USB 3.0 port
1 x Port dedicated Ethernet
6 x Port switched Eth…
Valks updated
6 years ago
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I've been looking for a generic CMSI-DAP library and came across this. Since there is no readme, I just wanted to hear about the state of the project. I primarily want to be able to easily turn any de…
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竟然能做到这么便宜?牛。linux内核能单步调试吗?如果能的话就太好了,内核调试链接过去的网页是空的
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Agencies will receive an email once a request has been submitted using our web form. We should identify what this email looks like and how it is structured.
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Nonvolatile storage is an integral part of TPM. It allows for saving user- or vendor-defined data inside TPM, potentially with protection based on state of TPM (PCR values, authorization sessions). Wi…
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Synchronizers need special handling and are usually hardened cells that include both the flops and have much better MTBF.
Using dedicated cells also helps in keeping the data delay between the two fl…
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Hi Kevin,
I've been trying to make ESP32-CAM [ex1](https://www.banggood.com/Geekcreit-ESP32-CAM-WiFi-+-Bluetooth-Camera-Module-Development-Board-ESP32-With-Camera-Module-OV2640--p-1394679.html?rmmds…