openrisc mor1kx issues - Githubissues

openrisc / mor1kx

mor1kx - an OpenRISC 1000 processor IP core

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issues

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Formal fixups.

#159 stffrdhrn closed 3 months ago
0
Status of FEATURE_FASTCONTEXTS in cappuccino

#158 zeldin opened 3 months ago
12
fix to unbreak verilator compatability

#157 hhe07 closed 4 months ago
2
How to run mor1kx with verilator?

#156 zhangkanqi closed 10 months ago
3
An error occurs when logical synthesis is performed using the Design Compiler

#155 RENEK-bool opened 11 months ago
0
ci: Get working on latest ubuntu

#154 stffrdhrn closed 1 year ago
1
Setting dcache cache width to 2 or 3 causes failures

#153 stffrdhrn opened 2 years ago
0
Disabling store buffer breaks LSU

#152 stffrdhrn opened 2 years ago
0
Complete formal proofs for LSU, Dcache and CPU modules

#151 stffrdhrn opened 2 years ago
0
Setting DBUS_WB_TYPE = "B3_READ_BURSTING" causes lockup

#150 jefferybond opened 2 years ago
1
Cache reorg

#149 SeifIbrahim closed 2 years ago
3
Make FPCSR is R/W accessible for both user- and supervisor- modes.

#148 stffrdhrn closed 2 years ago
1
Revert "dcache: Allow writing during write_pending"

#147 stffrdhrn closed 2 years ago
3
Linux crashes with latest master

#146 stffrdhrn closed 2 years ago
6
Implement write access to FPCSR if SR[SUMRA] is raised.

#145 bandvig closed 2 years ago
3
core: Add parameters to the synth job

#144 stffrdhrn closed 2 years ago
3
Licence switch OHDL to CERN OHL-W V2

#143 juliusbaxter closed 2 years ago
1
licensing: replace OHDL headers with CERN OHL-W v2 headers

#142 juliusbaxter closed 2 years ago
2
Unable to write to the EEAR register from the supervisor mode.

#141 Rahul-Kande opened 3 years ago
4
The EPCR register is accessible from user mode

#140 Rahul-Kande opened 3 years ago
3
The carry flag implementation is not correct for subtract instructions

#139 Rahul-Kande opened 3 years ago
2
Update Mor1kx-Formal project progress in Readme

#138 Harshitha172000 closed 3 years ago
2
onehot of SPR acknowledgments fail

#137 Harshitha172000 opened 3 years ago
2
spr_ack is high when there is no mtspr/mfspr instructions

#136 Harshitha172000 opened 3 years ago
2
SPR property fails when debug unit is enabled

#135 Harshitha172000 opened 3 years ago
2
Data bus Wishbone Interface Formal Check fails

#134 Harshitha172000 opened 3 years ago
2
Formal: Wishbone Interface

#133 Harshitha172000 closed 3 years ago
1
Formal: Update ALU Multiclock Interface

#132 Harshitha172000 closed 3 years ago
2
formal: Update ALU serial operations to time until complete

#131 stffrdhrn closed 3 years ago
3
Formal- spr interface

#130 Harshitha172000 closed 3 years ago
1
icache: Don't allow invalidate on reset or error

#129 stffrdhrn closed 3 years ago
0
Formal checks CI

#128 Harshitha172000 closed 3 years ago
1
spr_bus_ack_o reset issue

#127 Harshitha172000 closed 3 years ago
5
117: Upgrade or1k-tests to 1.0.4

#126 stffrdhrn closed 3 years ago
0
Librecores CI failing

#125 stffrdhrn closed 3 years ago
3
Fix issues related to successive mtspr/mtspr instructions

#124 stffrdhrn closed 3 years ago
2
Erroneous ICache hits impact performance counters

#123 Harshitha172000 opened 3 years ago
7
sequential mtspr calls fail

#122 stffrdhrn closed 3 years ago
4
workflows: Update or1k-tests to 1.0.3

#121 stffrdhrn closed 3 years ago
0
Formal

#120 Harshitha172000 closed 3 years ago
13
Bug in mor1kx_cache_lru

#119 Harshitha172000 closed 3 years ago
3
Convert Travis CI to GitHub Actions

#118 stffrdhrn closed 3 years ago
1
IMMU issues when DMMU disabled

#117 stffrdhrn closed 3 years ago
1
travis: Env vars are no longer passed to docker, maybe quotes?

#116 stffrdhrn closed 3 years ago
0
Fix underflow flag behavior

#115 bandvig closed 3 years ago
3
Fix mor1kx_decode to accept valid l.fl1 (l.ff1) instructions (#110)

#114 rkrajnc closed 4 years ago
1
back to back multiply, mtspr and multiply.

#113 JaewonHur opened 4 years ago
0
subtract offset (0x400) when accessing shadow registers

#112 JaewonHur closed 4 years ago
0
fix a_ltu_b, a is lower than b when adder_carry_out is set

#111 JaewonHur closed 4 years ago
0
Fix mor1kx_decode to accept valid l.fl1 (l.ff1) instructions

#110 JaewonHur closed 4 years ago
0