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Hi all,
Attached is a benchmark of AxiSEM synthetics against [FK synthetics](http://www.eas.slu.edu/People/LZhu/home.html), using the "scak" model from the University of Alaska, Fairbanks. The fit…
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We are trying to use our 6T SRAM design instead of the BRAM for simulation. I understand that we would still need the BRAM to copy the image(vmem or elf) into the memory. My idea is to copy the …
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Is there a specific reason that CollisionObjects are mostly created in the constructor of a simulation object, but never explicitly de-registered or destroyed? Would it be reasonable to include the cr…
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When I run simulation of our Java robot on my Linux machine, it pegs all the cores.
VisualVM says the process isn't doing much except waiting on notifiers. Maybe those are spinning?
It doesn't …
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Hi there,
Are there any implementations related to asynchronous FL?
Especially the state-of-the-art paper: Asynchronous Federated Optimization
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The latest uvm-python depends on cocotb 1.5.0.rc2 which seems to have issues with verilator.
Even trying to set a combination of dependencies that could work seems to hang the simulation process, m…
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Hepmc3 vertices contain a status code which there currently appears no way to keep to the DD4hep output (edm4hep).
We are wanting to use hepmc events which will contain several vertices coming from…
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Hi @mtiller!
I'm currently looking for a good (free/open source) package with which to write unit and integration tests for code I'm writing.
I have tried to run the tests for XogenyTest1.1 included…
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nbecu updated
4 years ago
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```
To reproduce the error:
1. Run STAMP labyrinth
2. Use simulation inputs as per the 0.97 README file
3. Use two processors and two threads
Output:
Validation should succeed, the console however s…