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## Precommit CI Run information
Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/10380598088
## Patch information
Applied patches: 1 -> 1
A…
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## Precommit CI Run information
Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/10270347129
## Patch information
Applied patches: 1 -> 1
A…
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# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|Resolved Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|Unresolved Failures|gcc|g++|gfortran|Previous …
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# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|linux: RVA23U64 profile lp64d medlow multilib |1491/94|0/0|0/0|[540c6b796fe3b6efb51a788cae511ef15b62801c](https://gcc.gn…
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https://github.com/cwt-lpi4a/linux-cwt-thead-lpi4a/blob/c8c9241e33a4830b4b7ea6123c41256dd22e8d9c/2-add_TH1520_C910_CFLAGS_AFLAGS.patch#L75C32-L75C42
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This model currently assumes there are 32 X registers i.e. the "embedded" ISA variants with only 16 registers are not supported.
The CHERIoT fork of this repo includes [a bit of a hack](https://githu…
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# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|Resolved Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|linux: rv32gcv_zve32f ilp32d medlow multilib |…
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# Summary
|New Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|Resolved Failures|gcc|g++|gfortran|Previous Hash|
|---|---|---|---|---|
|Unresolved Failures|gcc|g++|gfortran|Previous …
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Hi Charles,
Following on from my previous issue https://github.com/SpinalHDL/NaxRiscv/issues/70#issuecomment-1910747595, where I had an error with the double and float tests using RVLS.
I didn'…
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## Precommit CI Run information
Logs can be found in the associated Github Actions run: https://github.com/ewlu/gcc-precommit-ci/actions/runs/10515090394
## Patch information
Applied patches: 1 -> 3
A…