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After setting the "Platform" correctly in the SDx project settings I was able to run the IDCT example in these tutorials in the current AWS FPGA Developer AMI. The only remaining problem is that the t…
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Hi I am currently developing a AI application on AWS. The DRAM onboard seems to be 64GB. So if I want to use the whole DDR bank while not mapping all the data in the host application memory space. wou…
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As far as I know, when compiling, I should use the compile.pl script.
I noticed that in the last line of the file, there is a command: "*_system "sdaccel alphadata_host.tcl" *_". But I did not instal…
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While troubleshooting #689, we found this error message in the logs.
It turns out it goes back to at least Sept 6th. Cause not yet known.
```
$ sudo ag -l args_w.*such | xargs ls -ltr
-rw-r--r…
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https://github.com/aws/aws-fpga/blob/master/SDAccel/docs/SDAccel_Power_Analysis.md
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Hello everyone,
I'm wondering to know what do you think about a project like SDAccel, but this time around SymbiFlow stack?
Here is something like what I'm thinking about:
![SDAccel in SymbiFlow]…
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In 'Profiling the Application' of section create my first SDAccel program - The SDAccel.ini has been replaced by the xrt.ini file **SDx 2019** ( [https://www.xilinx.com/support/documentation/sw_manual…
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Hi
I am a starter for Alveo and SDAccel.
I met an issue when I used the getting-started-rtl-kernels example,
https://github.com/Xilinx/SDAccel-Tutorials/tree/master/docs/getting-started-rtl-k…
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Hello,
I try to compile Gemx for an Xilinx_adm-pcie-7v3_1ddr_2_1. However, the compilation ends up with the following error:
$ make run_hw SDA_FLOW=hw GEMX_ddrWidth=32 GEMX_gemmMBlocks=8 GEMX_ge…
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During a hardware test, 2 out of 3 builds failed:
http://jenkins.nerabus-infra.com:8080/blue/organizations/jenkins/reconfigureio%2Freco-sdaccel/detail/master/721/pipeline/75/
The logs were a lit…