Digilent digilent-xdc issues

Digilent / digilent-xdc

A collection of Master XDC files for Digilent FPGA and Zynq boards.

MIT License

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issues

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Update Zedboard-Master.xdc

#27 ashwin7999 closed 1 year ago
0
Files have no copyright

#26 christopher-bowman opened 1 year ago
0
Update Arty-Z7-20-Master.xdc

#25 gongouveia closed 1 year ago
0
Add qspi_sck to Cmod-A7-Master

#24 kargeor opened 1 year ago
0
Add CONFIG_VOLTAGE and CFGBVS configuration options for (Nexys) boards

#23 nejci opened 2 years ago
0
Fix typo

#22 eustas closed 1 year ago
0
Elodg patch 1

#21 elodg closed 2 years ago
0
Is UART Flow Control Useable?

#20 Nick-Markels opened 2 years ago
0
Arty A7: remove differences between models 35 and 100

#19 japm48 opened 2 years ago
0
Basys 3 Dicts

#18 artvvb closed 2 years ago
0
Arty Z7: Add comments with pin numbers to Pmod ports and reorder JB

#17 artvvb closed 2 years ago
0
The constraint file of genesys2 is inconsistent with the document

#16 245950258 closed 3 years ago
1
Cora Z7 > Pmod JB > reversed pin assignment?

#15 yasokada closed 4 years ago
1
created a readme.md file

#14 loser23 closed 2 years ago
1
Genesys-ZU-3EG: add syzygy_d_n pins

#13 Demon000 closed 2 years ago
0
Voltage constraints

#12 ChrisAndrea2011 closed 4 years ago
1
Is there a reason why the Nexys A7 boards have LVCMOS18 on SW[8] and SW[9] while the other ports are LVCMOS33?

#11 mloupe closed 4 years ago
1
Mismatch in UART pins between vivado board file and .xdc file for CMOD-A735

#10 JaredTCan closed 4 years ago
1
DDR pin

#9 LeiWang1999 opened 5 years ago
3
Arty-A7 35 and 100

#8 japm48 opened 5 years ago
0
Wrong Pin assignment

#7 larenge2 closed 5 years ago
1
Typo in cora z10 xdc

#6 josefoelias closed 5 years ago
1
Typo in Cmod-S7-25-Master.xdc

#5 begranger closed 5 years ago
1
fork

#4 Bradley-C closed 6 years ago
0
Arty z7-10 missing pins?

#3 raresandrei opened 6 years ago
0
RX/TX IN/OUT in interface names mixed

#2 DanielKOcean closed 7 years ago
0
Some boards use two-line per port xdc format

#1 artvvb closed 4 years ago
1