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OpenXiangShan
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XiangShan
Open-source high-performance RISC-V processor
https://xiangshan.cc
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fix(TLB, RVH): delete the s1tagfix which maybe cause the tag check to fail
#3685
pxk27
closed
1 month ago
1
fix(CSR): remove reg in `scountovf`
#3684
wissygh
closed
1 month ago
2
feat(Trigger): Trigger Module support mcontrol6.
#3683
wissygh
closed
1 month ago
1
fix(rob): update robentry.interrupt_safe when uop enter rob.
#3682
wissygh
closed
1 month ago
1
fix(PTW, RVH): add the high bits check of the first s2xlate when the req is allstage
#3681
pxk27
closed
3 weeks ago
2
fix(Zcb): Fixed the illegal instruction judgment condition of the zcb…
#3680
TheKiteRunner24
closed
1 month ago
1
fix(PTW, RVH): modify the logic of checking high bits of gpaddr
#3679
pxk27
closed
3 weeks ago
4
dump-wave config: how display structs of sv in vcd wave when use gtkwave
#3678
wyz-icer
opened
1 month ago
1
It looks like Xiangshan didn't commit every instruction in Rob?
#3677
zhangkanqi
closed
1 month ago
0
feat(rv64v): Added support for vector's vstart, first-only-fault, trigger
#3676
Anzooooo
closed
1 month ago
0
submodule(CoupledL2): bump CoupledL2
#3675
Maxpicca-Li
closed
1 month ago
1
fix(tlb): overwrite resp information when high address exception happens
#3674
good-circle
closed
1 month ago
1
fix(tlb): resp.miss should be false when high address exception happens
#3673
good-circle
closed
1 month ago
0
feat(SoC): Replace DummyLLC with OpenLLC+OpenNCB in KunminghuV2Config
#3672
sumailyyc
closed
3 weeks ago
2
fix(sc): SCTable dual port SRAM reads and writes to the same address processing
#3671
sleep-zzz
closed
1 month ago
2
bpu: Optimize CGE of bpu/previous_s2_*
#3670
Lawrence-ID
opened
1 month ago
1
fix(BPU): remove reg of reset_vector
#3669
Tang-Haojin
closed
1 month ago
3
fix(IMSIC): add TLBuffer for tilelink IO
#3668
Tang-Haojin
closed
1 month ago
0
fix(combmem): remove x assignment if ren is low
#3667
Tang-Haojin
closed
1 month ago
1
How did Xiangshan achieve 10Mhz uart_16550?
#3666
LOCKEDGATE
opened
1 month ago
2
fix(CSR): remove reg in mhartid
#3665
huxuan0307
closed
1 month ago
1
fix(vtypegen): fix initial condition after receive redirect
#3664
Ziyue-Zhang
closed
1 month ago
1
How to set trapCode to STATE_GOODTRAP by instruction?
#3663
zhangkanqi
closed
1 month ago
4
fix(cmo): Support Difftest with cbo.inval instruction
#3662
happy-lx
closed
1 month ago
1
fix(PTW, RVH): add the check A bit in HPTW when G-stage is for VS-stage
#3660
pxk27
closed
1 month ago
1
bpu: optimize CGE of bpu/previous_s2_*
#3659
Lawrence-ID
closed
1 month ago
0
fix(rv64v): not modify fflags when vl is zero
#3658
Ziyue-Zhang
closed
1 month ago
1
fix(PTW, RVH): fix the priority of gpf, gaf and gvpn_gpf in PTW
#3657
pxk27
closed
1 month ago
1
submodule(CoupledL2): Fix DataStorage `en` signal
#3656
Ivyfeather
closed
1 month ago
2
PPA(MemBlock) :optimise area and power (Tmp branch for test)
#3655
jin120811
closed
1 week ago
1
Error occurred while comparing the execution of linux.bin.
#3654
han-jianing
opened
1 month ago
12
RAS: add assertions to facilitate debugging
#3653
my-mayfly
closed
3 weeks ago
1
0925 tmptest
#3652
good-circle
closed
1 month ago
1
fix(Pmem): memory range should be 'or'ed rather than 'and'ed
#3651
Tang-Haojin
closed
1 month ago
2
fix(Backend): connect missing `cpuHalted` signal
#3650
Tang-Haojin
closed
1 month ago
1
build(Makefile): set default CHI issue to E.b
#3649
linjuanZ
closed
1 month ago
1
submodule(CoupledL2): fix bugs in DCT and linkactive
#3648
Kumonda221-CrO3
closed
1 month ago
2
fix(csr): change connect0LatencyCtrlSingal to connectNonPipedCtrlSingal
#3647
xiaofeibao-xjtu
closed
1 month ago
1
fix(VLSU): fix bug in flush of pipeline connect & skid buffer
#3646
weidingliu
closed
1 month ago
1
How to Determine Which Instruction Exactly Triggered the Branch Miss-prediction in the Current Clock Cycle?
#3645
zhangkanqi
closed
1 month ago
2
fix(CSR,interrupt): use rdata instead of regOut to produce interrupt
#3644
huxuan0307
closed
1 month ago
1
fix(vlwakeup): fix vl write back wakeup from intExu or vfExu
#3643
Ziyue-Zhang
closed
1 month ago
1
0924 tmptest
#3642
good-circle
closed
1 month ago
1
fix(ftb): When FTB is closed, the s2_multi_hit_enable should be lowered & Add FTB reading port low fallthroughErr assert.
#3641
sleep-zzz
closed
1 month ago
2
feat(CSR): add No.16,18 and 19 exceptions
#3640
huxuan0307
closed
1 month ago
1
fix(exception): fix exception vaddr generate logic
#3639
good-circle
closed
1 month ago
3
How Many LUTs Are Required for the FPGA Minimal System of the Xiangshan Processor to Operate Normally?
#3638
Stars-Collector
opened
1 month ago
1
submodule(CoupledL2): fix bug in ordering between snoop and read
#3637
linjuanZ
closed
1 month ago
1
fix(BPU): adjust s3 target when fallThroughErr signal is high
#3636
my-mayfly
closed
1 month ago
2
fix(ghist): fix ghist maintaining
#3635
eastonman
closed
1 month ago
1
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