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TENNLab-UTK
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fpga
FPGA neuromorphic elements, networks, processors, tooling, and software interfaces.
Mozilla Public License 2.0
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`fire_like_ravens` support.
#21
keegandent
opened
2 days ago
1
Unimplemented RISP parameters
#19
jimplank
closed
2 days ago
1
`apply_spikes()` using unit range instead of integer values
#18
keegandent
opened
3 days ago
0
RISP Neuron Infinite Negative Charge?
#17
keegandent
opened
4 days ago
5
SUM_WIDTH and THRESHOLD_INCLUSIVE fixes, etc.
#16
keegandent
closed
4 days ago
0
RISP neuron model fire comparison is incorrectly evaluated
#15
BGull00
opened
1 week ago
6
RISP neuron model SUM_WIDTH is incorrectly calculated
#14
BGull00
closed
4 days ago
2
Fix tvalid Reset Bug in Stream Source
#12
keegandent
closed
1 day ago
0
In SISO mode, AXIS master tvalid signal is uneffected when AXIS slave tready signal goes low.
#11
BGull00
closed
1 day ago
5
Processor apply_spike method should translate unit range to discrete charge integers
#10
keegandent
opened
2 weeks ago
22
Multiple Networks on Processor
#9
keegandent
opened
2 weeks ago
2
"Binary" or "Fire" Source Modes
#8
keegandent
opened
2 weeks ago
7
Packet Visualizer!
#7
keegandent
closed
1 week ago
1
Fix breaking cocotb tests
#6
keegandent
closed
3 weeks ago
1
AXIS Processor can only run at half clock rate with Stream Source
#4
keegandent
closed
1 day ago
1
test_simple_processor fails
#3
BGull00
closed
3 weeks ago
4
Create distinction between targets and build hosts
#2
keegandent
opened
1 month ago
1
Dispatch sink
#1
keegandent
closed
2 weeks ago
0