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TerosTechnology
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colibri
https://terostechnology.github.io/colibri
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fig bug \n!
#197
qarlosalberto
closed
3 years ago
0
Fix tab use capabilities for s3sv
#196
suzizecat
closed
3 years ago
0
Update s3sv.js
#195
qarlosalberto
closed
3 years ago
0
Transmit s3sv options through dict
#194
suzizecat
closed
3 years ago
0
Add 's3sv' SystemVerilog formatter backend
#193
suzizecat
closed
3 years ago
0
vhdl package doc
#192
smgl9
closed
3 years ago
0
Fix vbus bug
#191
smgl9
closed
3 years ago
0
fix bug
#190
qarlosalberto
closed
3 years ago
0
Fix ci and verilog template indent
#189
smgl9
closed
3 years ago
0
fix documentation for global definitions in verilog
#188
smgl9
closed
3 years ago
0
Verilog template indent
#187
qarlosalberto
closed
3 years ago
0
fix bug
#186
qarlosalberto
closed
3 years ago
0
`define paramters confuse the diagram generator.
#185
tarsJr
closed
3 years ago
3
fix bug linter windows
#184
qarlosalberto
closed
3 years ago
0
consolelog istyle formatter
#183
qarlosalberto
closed
3 years ago
0
Update workflow
#182
smgl9
closed
3 years ago
0
175 doxygen commands support
#181
el3ctrician
closed
3 years ago
0
Revert "175 doxygen commands support"
#180
smgl9
closed
3 years ago
0
update diagram
#179
smgl9
closed
3 years ago
0
mermaid support
#178
smgl9
opened
3 years ago
4
175 doxygen commands support
#177
el3ctrician
closed
3 years ago
1
save svg without fsm
#176
smgl9
closed
3 years ago
0
Doxygen commands support
#175
el3ctrician
closed
3 years ago
12
Fix bugs
#174
qarlosalberto
closed
3 years ago
0
Fix bugs
#173
qarlosalberto
closed
3 years ago
0
CI parser & templates
#172
smgl9
closed
3 years ago
0
Change documentation titles
#171
smgl9
opened
3 years ago
0
Comments
#170
qarlosalberto
closed
3 years ago
0
extract fsm
#169
qarlosalberto
closed
3 years ago
0
Verilog FSM
#168
qarlosalberto
closed
3 years ago
0
V package
#167
smgl9
closed
3 years ago
0
ci_parser
#166
smgl9
closed
3 years ago
0
fix constants
#165
smgl9
closed
3 years ago
0
fix bugs
#164
qarlosalberto
closed
3 years ago
0
162 fix doc
#163
smgl9
closed
3 years ago
0
fix_v_doc
#162
smgl9
closed
3 years ago
0
155 verilog array
#161
smgl9
closed
3 years ago
0
Port name detection error for buses.
#160
tarsJr
closed
3 years ago
6
156 vhdl sm
#159
qarlosalberto
closed
3 years ago
0
always documentation
#158
smgl9
closed
3 years ago
9
add SV parser
#157
smgl9
opened
3 years ago
0
VHDL state machine diagram
#156
qarlosalberto
closed
3 years ago
0
support arrays in doc
#155
smgl9
closed
3 years ago
0
152 verilog port docs
#154
smgl9
closed
3 years ago
0
Fix bugs messages
#153
qarlosalberto
closed
3 years ago
0
improve verilog port parsing
#152
smgl9
closed
3 years ago
0
document port groups
#151
smgl9
closed
3 years ago
0
templates style_update
#150
smgl9
closed
3 years ago
0
146 v template
#149
smgl9
closed
3 years ago
0
Add ActiveHDL and RivieraPRO linter support
#148
GlenNicholls
opened
3 years ago
0
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