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calyxir
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calyx
Intermediate Language (IL) for Hardware Accelerator Generators
https://calyxir.org
MIT License
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Introduce calyx -> axi-wrapped-calyx `fud2` path
#1994
nathanielnrn
closed
3 weeks ago
0
Toplevel `ref` cells are not kept after `compile_invoke` pass
#1993
nathanielnrn
opened
1 month ago
0
Add a combinational constant multiplication primitive
#1992
andrewb1999
closed
1 month ago
0
Add combinational multiplier primitive
#1991
andrewb1999
closed
1 month ago
2
Parse error for large constants
#1989
Mark1626
opened
1 month ago
2
[Cider 2] Memory data dump format & serialization/deserialization
#1988
EclecticGriffin
closed
1 month ago
0
Data conversion part 2
#1987
Angelica-Schell
closed
3 weeks ago
0
Cider dap rework
#1986
eliascxstro
closed
1 month ago
1
Use External Libraries To Generate A Single Verilog File
#1985
jiahanxie353
opened
1 month ago
0
Tests are being duplicated
#1984
rachitnigam
closed
1 month ago
1
Revert "Add infrastructure for integrating BTOR2 interpreter into Calyx"
#1983
obhalerao
closed
1 month ago
1
Add `CONTRIBUTING.md`
#1981
rachitnigam
opened
1 month ago
3
Fix hyperlinks to documentation for fud/frontends
#1980
javathunderman
closed
1 month ago
1
New metadata format
#1979
eliascxstro
closed
2 days ago
2
Update CI to run on fork-based PRs and use proper repo when checking out
#1978
YJDoc2
closed
1 month ago
5
Data conversion
#1977
Angelica-Schell
closed
1 week ago
2
Add playground config validation script and CI
#1976
YJDoc2
closed
1 month ago
6
Change the AXI generator to not emit 0 wide port lengths due to `clog2`
#1975
nathanielnrn
closed
2 months ago
1
Let calyx-ir build with `serialize` feature
#1974
nathanielnrn
closed
2 months ago
0
[Cider 2] Fix extra cycle
#1973
EclecticGriffin
closed
2 months ago
0
Add infrastructure for integrating BTOR2 interpreter into Calyx
#1972
obhalerao
closed
1 month ago
3
a tiny patch for the width check
#1971
EclecticGriffin
closed
2 months ago
0
Make inline prim input type explicit
#1970
matth2k
closed
2 months ago
1
Support for arbitrary widths greater than 64
#1969
matth2k
closed
2 months ago
4
[Cider 2] Handle memory input/output
#1968
EclecticGriffin
closed
4 days ago
4
[Cider 2.0] Remaining comb prims and the seq mem implementation
#1967
EclecticGriffin
closed
2 months ago
0
Default nettype of inline verilog primitives is unset
#1966
matth2k
closed
2 months ago
3
merge Fud2 example
#1965
eys29
closed
2 months ago
0
Add dimensional and type data to `yxi` outputs
#1964
nathanielnrn
closed
1 month ago
5
Components that do a single read/write to a `seq_mem` generate circular combinational logic
#1963
nathanielnrn
opened
2 months ago
2
[fud2] Several more tests
#1962
sampsyo
closed
2 months ago
0
`clk` signal not respecting cycle length
#1961
paili0628
closed
2 months ago
4
Performance Dashboard Planning
#1960
parthsarkar17
opened
2 months ago
2
[fud2] Hypergraph
#1958
sampsyo
opened
2 months ago
2
Bump mio from 0.8.10 to 0.8.11
#1957
dependabot[bot]
closed
2 months ago
1
Toplevel `ref` cells interfere with static promotion
#1956
ayakayorihiro
opened
2 months ago
4
`seq-mem` outputs `x`s when not explicitly assigning to `write_en`
#1955
nathanielnrn
opened
2 months ago
4
[fud2] Basic testing setup
#1954
sampsyo
closed
2 months ago
0
Axi wrapper fixes
#1953
nathanielnrn
closed
2 months ago
1
Add `external-to-ref` pass
#1952
nathanielnrn
closed
2 months ago
1
Calyx LSP Tracker / Wishlist
#1951
sgpthomas
opened
2 months ago
0
Improve LSP error reporting
#1950
sgpthomas
opened
2 months ago
2
Fix playground deployment
#1949
YJDoc2
closed
2 months ago
6
Fix publishing for calyx-lsp
#1948
sgpthomas
closed
2 months ago
0
Cannot publish `calyx-lsp`
#1947
rachitnigam
closed
2 months ago
4
Fix VSCode publish CI
#1946
sgpthomas
closed
2 months ago
3
[Calyx-FIRRTL] Primitive Template bug fixes and `std_mult_pipe` implementation
#1945
ayakayorihiro
closed
2 months ago
1
[Calyx-FIRRTL] Initialize output ports
#1944
ayakayorihiro
closed
2 months ago
1
[fud2] Write some design docs
#1943
sampsyo
closed
2 months ago
0
Fix `build.rs` script
#1942
rachitnigam
closed
2 months ago
0
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