chipsalliance rocket-chip issues

chipsalliance / rocket-chip

Rocket Chip Generator

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issues

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Debugging with GCD Link broken

#3581 sebastianornelas opened 7 months ago
0
Delete SFC RegisteredLibrary file

#3580 tymcauley closed 7 months ago
0
Compile error on Chisel 6+ due to firrtl.options.RegisteredLibrary

#3579 tymcauley closed 7 months ago
1
Support pulling out full imul response

#3578 jerryz123 closed 7 months ago
0
FIFOFixer should be identity when no clients may request Fifo

#3577 jerryz123 closed 7 months ago
0
[NoMerge] Pending PRs for T1 Tile

#3576 sequencer closed 7 months ago
1
Purge xbus in BaseSubsystem

#3575 sequencer closed 7 months ago
0
Prepare to purge resource API

#3574 sequencer closed 7 months ago
0
remove depending on explicit SBUS

#3573 sequencer closed 7 months ago
0
Use sortedSlaves in some TL helpers

#3572 jerryz123 closed 7 months ago
0
Move diplomacy to standalone library absorbing aop

#3571 lordspacehog closed 7 months ago
11
can I remove the itim and tlb from the icache ?

#3570 srishti-sr closed 7 months ago
1
Add error message in LazyModule construction

#3569 jerryz123 closed 7 months ago
1
Modularize PMA-checking functionality

#3568 jerryz123 closed 7 months ago
2
Add slave node to RoCC

#3567 richardyrh closed 7 months ago
1
Sync master into dev

#3566 jerryz123 closed 8 months ago
2
Remove deprecated RegisterRouter APIs

#3565 jerryz123 closed 8 months ago
0
Add customDecoder interface to rocket

#3564 jerryz123 opened 8 months ago
1
Fix build.

#3563 gonsolo closed 8 months ago
1
"Hello world" simulation target and instruction in README.md

#3562 gonsolo opened 8 months ago
0
Fix Chisel deprecated APIs

#3561 SpriteOvO closed 8 months ago
0
Add hardware debug ROB

#3560 joonho3020 closed 8 months ago
1
Trace wb dev

#3559 joonho3020 closed 8 months ago
1
Trace wb

#3558 joonho3020 closed 8 months ago
1
Update ECC SRAM to improve throughput on full write

#3557 Kevin99214 closed 8 months ago
0
Update README.md

#3556 menotti closed 8 months ago
1
Add api for tracing reg writebacks

#3555 joonho3020 closed 8 months ago
1
Fix outdated technical report link.

#3554 FantasqueX closed 8 months ago
1
Remove the unused outer argument in HellaCacheBundle

#3553 poemonsense closed 9 months ago
2
REMU `x` by zero on the Rocket chip writes `0x0` to `rd` instead of `x`

#3552 morecoding2 closed 9 months ago
1
Divide by zero on the Rocket chip and writes `0x0` to `rd` instead of `0xffffffffffffffff`

#3551 morecoding2 closed 9 months ago
0
Executing c.fld on Rocket chip load the wrong value in the destination register

#3550 morecoding2 closed 9 months ago
1
Fix AXI4 Xbar elaboration error due to missing fields

#3549 tymcauley closed 7 months ago
6
Error in AXI4 Xbar with unused fields

#3548 tymcauley closed 7 months ago
1
refactor(doc): update diplomacy adder code sample to pass compiling

#3547 SpinEch0 closed 9 months ago
2
SContext is remaps to HContext when in VSMode

#3546 JulianBailey closed 9 months ago
0
It is needed to clarify dependent tools version

#3545 SpinEch0 closed 7 months ago
5
LR/SC unexpectedly fails when there is a jump in program

#3544 youzi27 closed 9 months ago
1
Remove Scalar Crypto and BitManip (copy #3532)

#3541 mergify[bot] closed 10 months ago
0
Support vector-units w/o L1D$ access (copy #3537)

#3540 mergify[bot] closed 9 months ago
2
Fence for RoCC on rocc-csr writes

#3539 jerryz123 closed 7 months ago
0
Add parameter to select rocc instruction buffer size

#3538 jerryz123 closed 10 months ago
0
Support vector-units w/o L1D$ access

#3537 sequencer closed 10 months ago
6
How to Remove PTW from Rocket Core.

#3536 ashu-bitspilani opened 10 months ago
2
SimJTAG connecting to OpenOCD

#3535 hyperion009 closed 10 months ago
1
The new decoder

#3534 cyyself opened 10 months ago
2
Embrace new world Chisel.

#3533 sequencer opened 10 months ago
12
Remove Scalar Crypto and BitManip

#3532 cyyself closed 10 months ago
5
Remove Scalar Crypto and BitManip

#3531 cyyself closed 10 months ago
1
Bump to Chisel 5.1

#3530 sequencer closed 10 months ago
1

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