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fabianschuiki
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llhd
Low Level Hardware Description — A foundation for building hardware design tools.
http://www.llhd.io
Apache License 2.0
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Update llhd-conv output mlir with cf dialect.
#156
DeepFlyingSky
opened
2 years ago
1
Fix doc: `ret` may not appear in a process
#155
ghost
closed
2 years ago
1
Fix struct type and struct_create operation printing
#154
maerhart
closed
3 years ago
0
Update MLIR writer to support newest version of CIRCT
#153
maerhart
closed
3 years ago
1
Quickfixes
#152
mike-kfed
closed
3 years ago
1
llhd-opt failes to produce structural llhd
#151
dvc94ch
opened
3 years ago
0
Enforce wait operand to be of type time
#150
fabianschuiki
closed
3 years ago
1
basic block name format fix (lose leading %)
#149
gameboo
closed
4 years ago
1
LLHD-Sim reg primitive not implemented
#148
wbouillo
opened
4 years ago
1
LANGUAGE.md typo
#147
gameboo
closed
4 years ago
1
TCM causes inst-already-inserted panic
#146
fabianschuiki
closed
4 years ago
0
Deseq not working on Moore always_ff output
#145
fabianschuiki
closed
4 years ago
0
Fix to ignore halt action at the end of entities for simulation.
#144
wbouillo
closed
4 years ago
0
Entity creating suspend action during simulation
#143
wbouillo
closed
4 years ago
4
Add name field to signals, instances, ports
#142
fabianschuiki
opened
4 years ago
0
Implement function simulation
#141
fabianschuiki
opened
4 years ago
0
Add zero/sign extension and truncation instructions
#140
fabianschuiki
opened
4 years ago
0
Add dynamic extract instructions
#139
fabianschuiki
opened
4 years ago
0
Const folding breaks on SV interface index access
#138
fabianschuiki
closed
4 years ago
0
deny missing docs in ir and opt modules
#137
azarmadr
closed
4 years ago
8
builder example is throwing errors
#136
azarmadr
closed
4 years ago
2
[mlir_writer] Use SSA name for signal names
#135
rodonisi
closed
4 years ago
0
Add writer for MLIR syntax
#134
maerhart
closed
4 years ago
0
Remove stderrlog in favor of env_logger
#133
fabianschuiki
closed
4 years ago
0
Merge llhd-sim and add trace regression tests
#132
fabianschuiki
closed
4 years ago
1
Lack of union type constructor.
#131
jaroslov
opened
4 years ago
1
Var-to-phi is overly aggressive
#130
fabianschuiki
opened
4 years ago
0
Entities shouldn't print dummy `halt` terminator
#129
fabianschuiki
closed
4 years ago
1
Spurious panics in var-to-phi promotion
#128
fabianschuiki
opened
4 years ago
0
Add MLIR input/output
#127
fabianschuiki
opened
4 years ago
2
Formal Verification Support
#126
huskyii
opened
4 years ago
1
`const` instruction suggestions
#125
gameboo
closed
4 years ago
2
Add FIRRTL input/output
#124
fabianschuiki
opened
4 years ago
2
grammar described in LANGUAGE.md does not match that of examples in llhd-sim repo ?
#123
gameboo
closed
3 years ago
9
Minor typo? + suggestion about the "any type"
#122
gameboo
closed
4 years ago
10
Simulation only instructions?
#121
gameboo
opened
4 years ago
6
Update dependencies
#120
eduardosm
closed
4 years ago
1
Minor typo fixes/suggestions
#119
gameboo
closed
4 years ago
0
Rust itself as LLHD frontend
#118
0x7CFE
opened
4 years ago
17
Add support for generating Finite State Machines (FSM) from behavioral code
#117
programmerjake
opened
4 years ago
0
Add Yosys's RTLIL input/output
#116
programmerjake
opened
4 years ago
11
Apply changes to arith/drv/reg instruction specs to codebase
#115
fabianschuiki
opened
4 years ago
0
Move signal probes in ECM instead of TCM
#114
fabianschuiki
opened
4 years ago
0
Check command outputs in `test.py`
#113
fabianschuiki
closed
4 years ago
0
Rename `licm` to `ecm`
#112
fabianschuiki
closed
4 years ago
0
Add execution trace test cases
#111
fabianschuiki
opened
4 years ago
0
Improve test coverage for assembly
#110
fabianschuiki
opened
4 years ago
0
Improve test coverage for transformations
#109
fabianschuiki
opened
4 years ago
0
Add module for IR analyses
#108
fabianschuiki
closed
4 years ago
0
Improve IR node handles
#107
fabianschuiki
opened
4 years ago
0
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