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grantslape
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CS3339-MIPS32
5 stage, pipelined MIPS32 processor in myHDL and Verilog
GNU General Public License v3.0
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TestInstMemPython fails intermittenly
#74
grantslape
opened
5 years ago
0
Main Issues
#73
grantslape
opened
6 years ago
1
0.10 upgrade && Python 3.6 && Docker
#72
grantslape
closed
6 years ago
0
Python 3.6 Upgrade
#71
grantslape
closed
6 years ago
0
Dockerize project
#70
grantslape
closed
6 years ago
0
readme and images
#69
gnarza
closed
6 years ago
0
id_ex structure (mem_to_reg)
#68
TitansMM
closed
6 years ago
0
README update and docs/images
#67
gnarza
closed
6 years ago
0
Dev
#66
TitansMM
closed
6 years ago
0
Basic Driver
#65
grantslape
closed
6 years ago
0
Titans mm dev 1
#64
TitansMM
closed
6 years ago
0
Project Setup Documentation
#63
TitansMM
closed
6 years ago
0
Driver working
#62
grantslape
closed
6 years ago
0
Titans mm dev 1
#61
TitansMM
closed
6 years ago
0
Add files via upload
#60
TitansMM
closed
6 years ago
0
Driver => Dev
#59
grantslape
closed
6 years ago
0
Mark dev
#58
MarkGitthens
closed
6 years ago
0
Branch Adder < Master
#57
grantslape
closed
6 years ago
0
Fix ex mem/mem_wb mem_to_reg
#56
grantslape
closed
6 years ago
0
Mark dev
#55
MarkGitthens
closed
6 years ago
0
Titans mm dev 1
#54
TitansMM
closed
6 years ago
0
ALU module
#53
serena-marie
closed
6 years ago
0
Remove the example.txt file in the bin folder?
#52
gnarza
closed
6 years ago
2
Add branch unit module
#51
patrickv83
closed
6 years ago
0
Natalie's modules
#50
grantslape
closed
6 years ago
1
Support for Arbitrarily Long Simulations
#49
grantslape
closed
6 years ago
0
Main Driver Structure
#48
grantslape
closed
6 years ago
3
fix addressing issue - we were only getting first 4 instructions
#47
grantslape
closed
6 years ago
0
Fix Ex/Mem tests
#46
grantslape
closed
6 years ago
0
ID/EX & Sign Extender
#45
grantslape
closed
6 years ago
0
Last of the Tests
#44
grantslape
closed
6 years ago
0
I addded inst_mem.v, inst_mem_tb.v, inst_mem.py, InstructionGenerator…
#43
TitansMM
closed
6 years ago
0
Supporting JAL
#42
grantslape
closed
6 years ago
3
Add Top4 to IF/ID
#41
grantslape
closed
6 years ago
0
Hazard Unit Module
#40
gnarza
closed
6 years ago
0
Byte Addressing vs. Word Addressing
#39
grantslape
closed
6 years ago
3
Inst Mem Tests
#38
grantslape
closed
6 years ago
0
Regfile with fixed tests
#37
patrickv83
closed
6 years ago
0
Add ex_mux and updated tests
#36
patrickv83
closed
6 years ago
0
Opcode table upload
#35
serena-marie
closed
6 years ago
4
More Tests
#34
grantslape
closed
6 years ago
0
New data_mem module
#33
patrickv83
closed
6 years ago
0
Add mem_wb latch python/verilog and updated test
#32
patrickv83
closed
6 years ago
0
Add files via upload
#31
TitansMM
closed
6 years ago
0
Fix forked test errors
#30
grantslape
closed
6 years ago
0
wb_mux module and tests
#29
patrickv83
closed
6 years ago
0
Data Mem unit tests
#28
grantslape
closed
6 years ago
0
Serena 3:1 mux dev
#27
serena-marie
closed
6 years ago
0
IF/ID and Hazard Unit tests
#26
grantslape
closed
6 years ago
0
fixed bad test error
#25
grantslape
closed
6 years ago
0
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