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Hi, I'm trying to synthesize this project and running into some errors.
I have very little experience with FPGAs so I'm sure I'm doing something wrong. I'm willing to learn though. My goal is to cr…
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**Describe the bug**
I installed neovim on Mac through homebrew and after doing PlugInstall, nvim-treesitter is not compiling the languages.
**To Reproduce**
Steps to reproduce the behavi…
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Hi, @Dolu1990
I'm using litex with your naxriscv and trying to figure out how I can integrate my IP with your code. My ip uses axi4
and it has:
> (1) an AXI4 master and a slave port;
(2) the m…
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The toolchain fails when I/O sites outside IOB_X0Yxxx are selected. Inside this range the tool runs without error but only a limited number of I/Os are operational in the resulting bitstream. See PR #…
jrrk2 updated
2 years ago
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Problem:
Currently, there is a method to support WS2812 LEDs through SPI, which is great. However, I would like to suggest the addition of support for WS2812 LEDs via PWM as well.
Description:
Th…
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afss ffa
```
#0 0x0000000000e87c85 llvm::sys::PrintStackTrace(llvm::raw_ostream&) (/fs/src/interfaces/LLVM_Project/QSCM/opt/llvm-3.9.1/linux64/bin/clang-3.9+0xe87c85)
#1 0x0000000000e88216 Si…
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I am writing a block to instantiate a tri-state buffer for every bit in an n bit signal. This is intended for use at the top level, to help tidy up the Vivado block diagram (I can instantiate one of t…
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What I am asking for is some details on how to use system bus backpressure signals, so I can integrate quark into my FPGA synthesis and Verilator simulation (ISA tests). I will get through anyway but …
jeras updated
2 years ago
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I will use this issue to keep track of the status of my efforts to add cocotb support to VUnit and receive suggestions and feedback. I am new to VUnit (I haven't used it as a testbenching framework be…
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I have a large vhdl design that uses a few different vhdl packages in multiple locations. I'm having trouble stitching everything together in both the .sby file and my System Verilog testbench. I can'…