nmi-leipzig sim-x-pll issues - Githubissues

nmi-leipzig / sim-x-pll

Verilog based simulation modell for 7 Series PLL

ISC License

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Compare this simulation model to the newly open source Xilinx provided model

#13 mithro opened 4 years ago
1
Cocotb

#12 tmahlburg opened 4 years ago
0
Verilator support?

#11 xobs closed 4 years ago
2
Mmcme2 base

#10 tmahlburg closed 4 years ago
0
Initial support for plle2_adv and restructure of the test environment

#9 tmahlburg closed 4 years ago
0
Did you want to move this to SymbiFlow/prjxray-sim-pll?

#8 mithro opened 4 years ago
1
Check parameters for conforming to the documentation.

#7 tmahlburg closed 4 years ago
0
Code Generator

#6 tigitadmin opened 4 years ago
0
Extend documentation

#5 tigitadmin opened 4 years ago
0
Check frequency for invalid values

#4 tigitadmin closed 4 years ago
0
Support dynamically change of arguments

#3 tigitadmin closed 4 years ago
0
Test bench in cocotb

#2 tigitadmin opened 4 years ago
1
Architecture diagram in README is broken

#1 mithro closed 4 years ago
1