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os-fpga
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Raptor
Raptor end-to-end FPGA Compiler and GUI
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Fixing EDA-3098, fix confusing message about DE eventual error
#1908
alaindargelas
closed
3 days ago
0
Rel 1 4 6
#1907
alaindargelas
closed
4 days ago
0
Release 1.4.6
#1906
alaindargelas
closed
4 days ago
0
I_FAB O_FAB in VHDL writer
#1905
alaindargelas
closed
4 days ago
0
Legalize BRAM/DSP clocks, GUI updates
#1904
alaindargelas
closed
4 days ago
0
fix EDA-3092 (GJC40 and GJC46), fix O_BUF to O_BUFT mapping
#1903
alaindargelas
closed
4 days ago
0
Submodule update/Fix EDA-2934
#1902
AYYAZmayo
closed
4 days ago
0
Replace O_BUF by O_BUFT techmap and blackbox
#1901
alaindargelas
closed
5 days ago
0
fix EDA-3084 (GJC21 and GJC32) and EDA-3083 (GJC6)
#1900
alaindargelas
closed
5 days ago
0
Enable IPA feature by default
#1899
ravikiranchollangi
closed
5 days ago
0
Fix EDA-3064/ Release 1.4.6_sim_models
#1898
AYYAZmayo
closed
5 days ago
0
checker: better messages and initial clock-data development
#1897
serge-dsa
closed
6 days ago
0
Fabric netlist clock info
#1896
alaindargelas
closed
1 week ago
0
update yosys_verific_rs
#1895
awaisabbas006
closed
1 week ago
0
Non det fix
#1894
alaindargelas
closed
1 week ago
0
Synth updates
#1893
alaindargelas
closed
1 week ago
0
Diverse synth updates
#1892
alaindargelas
closed
1 week ago
0
pin_c: FCLK_BUF translation issue EDA-3040
#1891
serge-dsa
closed
1 week ago
0
IP Catalog updates till 17 July
#1890
bilal458
closed
1 week ago
0
generic attribute_based clkbuf, EDA-3010
#1889
alaindargelas
closed
1 week ago
0
fix EDA-3065, CS clk_buf and fclk_buf tets case, GJC27_28_29
#1888
alaindargelas
closed
1 week ago
0
pin_c: translate clock name to post-edit EDA-3041
#1887
serge-dsa
closed
1 week ago
0
Release 1.4.4
#1886
alaindargelas
closed
2 weeks ago
0
new iofab mapper that inserts also I_FAB cells
#1885
alaindargelas
closed
2 weeks ago
0
new iofab mapper that inserts also I_FAB cells
#1884
alaindargelas
closed
2 weeks ago
0
DSP packer connectivity checker
#1883
alaindargelas
closed
2 weeks ago
0
Reduce synth rerun
#1882
alaindargelas
closed
2 weeks ago
0
Foedag updates 07-12
#1881
alaindargelas
closed
2 weeks ago
0
I_FAB primitive support
#1880
alaindargelas
closed
2 weeks ago
0
fix EDA-3048, EDA-3052 and add O_FAB inference
#1879
alaindargelas
closed
2 weeks ago
0
fix EDA-3048, EDA-3052 and add O_FAB inference
#1878
alaindargelas
closed
2 weeks ago
0
tmp fix for new iobuf map
#1877
alaindargelas
closed
2 weeks ago
0
Turn on new iobuf inference
#1876
alaindargelas
closed
2 weeks ago
0
update OpenFPGA and explicitely enable VPR-server in Backend
#1875
serge-dsa
closed
2 weeks ago
0
fix new iobuf map, $fatal sim model
#1874
alaindargelas
closed
2 weeks ago
0
Checkout the libs/EXTERNAL/sockpp in vtr
#1873
NadeemYaseen
closed
2 weeks ago
0
Release 1.4.3 and new pll infer
#1872
alaindargelas
closed
2 weeks ago
0
backend: merged OpenFPGA
#1871
serge-dsa
closed
2 weeks ago
2
Revert "Release 1.4.3"
#1870
alaindargelas
closed
2 weeks ago
0
Release 1.4.3
#1869
alaindargelas
closed
2 weeks ago
0
primitive_example_design_1 fix
#1868
alaindargelas
closed
2 weeks ago
0
Raptor crash case with Pin Planner
#1867
w0lek
closed
1 week ago
4
Fix smoke test
#1866
alaindargelas
closed
2 weeks ago
0
Revert "Revert "Simplify model config, create_gen_clock bug fix""
#1865
alaindargelas
closed
2 weeks ago
0
Simplify config map
#1864
chungshien-chai
closed
2 weeks ago
0
Revert "Simplify model config, create_gen_clock bug fix"
#1863
alaindargelas
closed
2 weeks ago
0
Simplify model config, create_gen_clock bug fix
#1862
alaindargelas
closed
2 weeks ago
0
Virtual clock fix
#1861
alaindargelas
closed
3 weeks ago
0
For BOOT_CLK and FCLK_BUF, use output net as linked_object naming
#1860
alaindargelas
closed
3 weeks ago
0
New IOBuf map off by default, create_clock on BOOT_CLOCK
#1859
alaindargelas
closed
3 weeks ago
0
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