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capstone-spec
Capstone-RISC-V ISA Reference
https://capstone.kisp-lab.org/
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DEBUG: SPLIT for uninit cap; cheri cmp insn table
#42
Mingkai-Li
opened
1 year ago
0
Virtual address capability (v-capability) support in the normal world
#41
Mingkai-Li
opened
1 year ago
0
Specify the handling of unrepresentable bounds
#40
jasonyu1996
opened
1 year ago
2
Allowing split of uninit caps
#39
jasonyu1996
closed
1 year ago
0
Cursor update in shrink necessary?
#38
hakase56557
closed
1 year ago
1
Fix logical discrepancyies in the spec
#37
Mingkai-Li
closed
1 year ago
0
Merge testing branch into master
#36
Mingkai-Li
closed
1 year ago
0
Add corresponding Sail definitions to the spec
#35
Mingkai-Li
closed
1 year ago
1
Pure/Trans Capstone -> Capstone-RISC-V
#34
Mingkai-Li
closed
1 year ago
0
Can we drop RI and use registers instead of immediates?
#33
trevorcarlson
closed
1 year ago
2
The instruction format name CI coincides with something in the RISC-V spec
#32
jasonyu1996
closed
1 year ago
2
Unexcepted behavior when giving same operands in capstone load/store instructions
#31
Mingkai-Li
closed
1 year ago
0
Minor revision for bugs and enhancements
#30
Mingkai-Li
closed
1 year ago
3
Improve the way we position Capstone and TransCapstone
#29
jasonyu1996
closed
1 year ago
1
Possibilities for an exception-free implementation?
#28
trevorcarlson
opened
1 year ago
0
#24 linearity/consistency/format revision
#27
Mingkai-Li
closed
1 year ago
9
Revocation for various capability types
#26
jasonyu1996
opened
1 year ago
0
Debug instruction section draft
#25
Mingkai-Li
closed
1 year ago
2
Revison to existing sections; Draft version -> 1st release version preparation
#24
Mingkai-Li
closed
1 year ago
4
#20 An appendix comparing Capstone-RISC-V, CHERI-RISC-V, and CHERIoT …
#23
jasonyu1996
closed
1 year ago
0
Bugs with CALL/RETURN and exception handling
#22
jasonyu1996
closed
1 year ago
2
Update Capstone instruction semantics
#21
Mingkai-Li
closed
1 year ago
2
CHERI instruction map and differences
#20
trevorcarlson
opened
1 year ago
2
Specified illegal instructions from base ISA
#19
jasonyu1996
closed
1 year ago
0
Specification of initial state after reset
#18
jasonyu1996
closed
1 year ago
0
#4 Updated interrupt/exception handling semantics
#17
jasonyu1996
closed
1 year ago
0
Add corresponding Sail definitions
#16
jasonyu1996
closed
1 year ago
2
Combine CCSRs with CSRs
#15
jasonyu1996
opened
1 year ago
1
Specify initial state after reset
#14
jasonyu1996
closed
1 year ago
0
List RV64I instructions and CSRs that are usable/not usable in Pure Capstone, secure world, and normal world
#13
jasonyu1996
closed
1 year ago
0
Clarify interactions between load/store of integers and load/store of capabilities
#12
jasonyu1996
closed
1 year ago
5
More thorough introduction to TransCapstone and Pure Capstone
#11
jasonyu1996
closed
1 year ago
0
Perms do not support all combinations -- could lead to incompatible new version being required
#10
trevorcarlson
closed
1 year ago
0
Additional instructions for TransCapstone
#9
Mingkai-Li
closed
1 year ago
1
Add instructions to fetch capability info
#8
jasonyu1996
closed
1 year ago
6
Optimise the instruction formats
#7
jasonyu1996
closed
1 year ago
10
Reorganise to separate TransCapstone and pure Capstone contents
#6
jasonyu1996
closed
1 year ago
1
Improve the debugging instructions
#5
jasonyu1996
closed
1 year ago
0
Specify behaviours with exceptions
#4
jasonyu1996
closed
1 year ago
12
Section 5 draft
#3
jasonyu1996
closed
1 year ago
11
Sections 2 and 3 fix
#2
jasonyu1996
closed
1 year ago
1
Section 4 draft
#1
jasonyu1996
closed
1 year ago
6