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riscv-p-spec
RISC-V Packed SIMD Extension
https://jira.riscv.org/browse/RVG-129
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Load/store/move double sub-extension
#155
christian-herber-nxp
opened
3 months ago
0
Overlapping MSUBR32
#154
pineapplehunter
opened
1 year ago
0
Where is the 30,000 ft overview?
#153
brucehoult
opened
1 year ago
1
Load-pair and store-pair instructions
#152
christian-herber-nxp
closed
3 months ago
9
Corrected the syntax of URSTSA16 instruction
#151
karans5
opened
1 year ago
0
How to build riscv-gnu-toolchain to compile P-ext instructions
#150
infini8-13
opened
1 year ago
1
SMUL16
#149
2276884692
opened
1 year ago
0
Possible clerical error in the "Operations" section of the UKSUBH instruction
#148
zhang-hairui
opened
1 year ago
0
An assembly alias of `WEXT` is considered harmful to toolchains (assembler)
#147
a4lg
opened
1 year ago
0
`CLROV` has fixed `rd` of `zero`
#146
a4lg
opened
1 year ago
0
Proposal: Add dependency to `Zicsr`
#145
a4lg
opened
1 year ago
1
non destructive ternary shuffling
#144
jnk0le
opened
1 year ago
1
destructive immediate bitfield insert
#143
jnk0le
opened
2 years ago
1
Add 32bit multiply with two 32bit add instruction
#142
ivq
opened
2 years ago
0
Problems with parameter type int16_t
#141
anderslindgren-iar
opened
2 years ago
1
Disabling P via misa CSR
#140
marcfedorow
opened
2 years ago
0
Removed non-overlapped instructions in Zbpbo (according to RVB v1.0.0)
#139
Harry-Andes
closed
2 years ago
1
Removed non-overlapped instructions in Zbpbo (according to B Extension v1.0.0)
#138
Harry-Andes
closed
2 years ago
1
BitManip overlaps do not exist
#137
allenjbaum
opened
2 years ago
5
SMUL[X]16 intrinsic rd type
#136
marcfedorow
opened
2 years ago
0
Add missing operands for SWAP8
#135
tclin914
closed
2 years ago
0
Unify format table style.
#134
tclin914
closed
2 years ago
0
Fix typo. unsigned -> upper
#133
tclin914
closed
2 years ago
0
Fix typo. Rv32 -> RV32
#132
tclin914
closed
2 years ago
0
KHMBB16
#131
iollmann
opened
2 years ago
0
Shift args
#130
marcfedorow
opened
2 years ago
0
Legal combinations table does not require zmmul / m-ext.
#129
marcfedorow
opened
2 years ago
0
Alias/intrinsic policy on overlapped insns
#128
marcfedorow
opened
2 years ago
0
KMADA32/KMAR64 encoding policy
#127
marcfedorow
opened
2 years ago
0
SMAL is the only multiplication insn that requires DATA64 RS1
#126
marcfedorow
opened
2 years ago
0
PACKU's 'U' is for 'upper' but not for 'unsigned'
#125
marcfedorow
closed
2 years ago
0
xUNPKD831 rd, rs1 insn should be an alias of SRxI16 rd, rs1, 8
#124
marcfedorow
opened
2 years ago
0
PBSAD: overflow ignored
#123
marcfedorow
opened
2 years ago
0
MAXU/MINU insns
#122
marcfedorow
opened
2 years ago
0
Rv32 typo
#121
marcfedorow
closed
2 years ago
1
SEXX(1) in AVE description
#120
marcfedorow
opened
2 years ago
1
Replaced insns should not take an opcode space
#119
marcfedorow
opened
2 years ago
1
About the input effective bits size of the KADDH?
#118
fioraking
closed
2 years ago
3
[Please mark Sub-extension infomation for every Instruction in Chapter 7!]
#117
fioraking
closed
2 years ago
0
fix typos and do some changes in intrinsics
#116
linsinan1995
closed
2 years ago
2
Excess Non-SIMD Q15 insns
#115
marcfedorow
closed
2 years ago
0
No zmbmo
#114
marcfedorow
closed
2 years ago
2
Make swap16 x1 an alias to grevi x1, x1, 16
#113
marcfedorow
opened
2 years ago
1
PKBB encodings
#112
marcfedorow
closed
2 years ago
1
Saturating insns probably should require VS!=Off if mstatus.VS is implemented
#111
marcfedorow
opened
2 years ago
2
[The Q15 of Non-SIMD is it necessary to exist?]
#110
fioraking
closed
2 years ago
3
ISA extension spec probably should not require intrinsics
#109
marcfedorow
opened
2 years ago
0
Opcode policy
#108
marcfedorow
opened
2 years ago
0
FSRI requires imm6u
#107
marcfedorow
opened
2 years ago
0
[riscv-b-spec version is v.1.0.0 now]
#106
fioraking
closed
2 years ago
5
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