scale-lab / OpenPhySyn

EDA physical synthesis optimization kit
https://woset-workshop.github.io/PDFs/2020/a09.pdf
BSD 3-Clause "New" or "Revised" License
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logic-synthesis optimization physical-design physical-synthesis

OpenPhySyn

OpenPhySyn is a physical synthesis optimization kit developed at Brown University SCALE lab as part of the OpenROAD flow.

Reference

If you use OpenPhySyn in your research or exeperimental evaluation, please cite OpenPhySyn's paper as:

@inproceedings{agiza2020openphysyn,
  title={Openphysyn: An open-source physical synthesis optimization toolkit},
  author={Agiza, Ahmed and Reda, Sherief},
  booktitle={2020 Workshop on Open-Source EDA Technology (WOSET)},
  year={2020}
}

Building

Clone and build OpenPhySyn using the following commands:

git clone --recursive https://github.com/scale-lab/OpenPhySyn.git
cd OpenPhySyn
mkdir build && cd build
cmake ..
make
make install # Or sudo make install
Psn
make test # Runs the unit tests

Dependencies

OpenPhySyn depends on the following libraries:

Docker Instructions

You can run OpenPhySyn inside Docker using the provided Dockerfile

docker build -t scale/openphysyn .
docker run --rm -itu $(id -u ${USER}):$(id -g ${USER}) -v $(pwd):/OpenPhySyn scale/openphysyn bash
Psn ./tests/tcl/getting_started.tcl

Getting Started

Read design and run a transform:

Psn
import_lef <lef file>
import_def <def file>
transform <transform name> <arguments...>
export_def <def file>

Example: Repair design timing violations

Psn ; # or ./build/Psn if not installed in the global path

import_lib ./tests/data/libraries/Nangate45/NangateOpenCellLibrary_typical.lib
import_lef ./tests/data/libraries/Nangate45/NangateOpenCellLibrary.mod.lef
import_def ./tests/data/designs/timing_buffer/ibex_gp.def
read_sdc ./tests/data/designs/timing_buffer/ibex_tight_clk.sdc

set_wire_rc 1.0e-03 1.0e-03 ; # or set_wire_rc <metal layer>

puts "=============== Initial Reports ============="
report_checks
report_check_types -max_slew -max_capacitance -violators
puts "Capacitance violations: [llength [capacitance_violations]]"
puts "Transition violations: [llength [transition_violations]]"
report_wns
report_tns

puts "Initial area: [expr round([design_area] * 10E12) ] um2"

puts "OpenPhySyn timing repair:"
repair_timing

puts "=============== Final Reports ============="
report_checks
report_check_types -max_slew -max_capacitance -violators
puts "Capacitance violations: [llength [capacitance_violations]]"
puts "Transition violations: [llength [transition_violations]]"
report_wns
report_tns

puts "Final area: [expr round([design_area] * 10E12) ] um2"

puts "Export optimized design"
export_def optimized.def

exit 0

You can also run the previous example from a Tcl script: ./build/Psn ./tests/tcl/getting_started.tcl

List available commands:

> Psn
> help
design_area         Report design total cell area
export_db           Export OpenDB database file
export_def          Export design DEF file
gate_clone          Perform load-driven gate cloning
get_database            Return OpenDB database object
get_database_handler        Return OpenPhySyn database handler
get_handler         Alias for get_database_handler
get_liberty         Return first loaded liberty file
has_transform           Check if the specified transform is loaded
help                Print this help
import_db           Import OpenDB database file
import_def          Import design DEF file
import_lef          Import technology LEF file
import_lib          Alias for import_liberty
import_liberty          Import liberty file
link                Alias for link_design
link_design         Link design top module
make_steiner_tree       Create steiner tree around net
optimize_design         Perform timing optimization
optimize_fanout         Perform maximum-fanout based buffering
optimize_logic          Perform logic optimization
optimize_power          Perform power optimization
pin_swap            Perform timing optimization by commutative pin swapping
print_liberty_cells     Print liberty cells available in the  loaded library
print_license           Print license information
print_transforms        Print loaded transforms
print_usage         Print usage instructions
print_version           Print tool version
propagate_constants     Perform logic optimization by constant propgation
timing_buffer           Repair violations through buffer tree insertion
repair_timing           Repair design timing and electrical violations through resizing, buffer insertion, and pin-swapping
capacitance_violations      Print pins with capacitance limit violation
transition_violations       Print pins with transition limit violation
set_log             Alias for set_log_level
set_log_level           Set log level [trace, debug, info, warn, error, critical, off]
set_log_pattern         Set log printing pattern, refer to spdlog logger for pattern formats
set_max_area            Set maximum design area
set_wire_rc         Set wire resistance/capacitance per micron, you can also specify technology layer
transform           Run loaded transform
version             Alias for print_version

List loaded transforms:

Psn
print_transforms

Print usage information for a transform:

Psn
transform <transform name> help

Running OpenSTA commands:

Psn
import_lef <lef file>
import_def <def file>
create_clock [get_ports clk] -name core_clock -period 10
report_checks

Default Transforms

By default, the following transforms are built with OpenPhySyn:

Fixing Timing Violations

The repair_timing command repairs negative slack, maximum capacitance and transition violations by buffer tree insertion, gate sizing, and pin-swapping.

repair_timing options:

Note: you should run the design through an external legalization pass after the optimization when running without plugging a legalizer or using legalization flags.

Example Code

Refer to the provided tests directory for C++ example code.

You can also refer to the tcl tests directory for examples for using the Tcl API.

Building Custom Transforms

For examples to add new transforms, check the standard transforms directory and the corresponding project configuration.

Issues

Please open a GitHub issue if you find any bugs.