soc-hub-fi headsail-vp issues

soc-hub-fi / headsail-vp

Headsail — Virtual Platform

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issues

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Add support for grouped convolution

#93 vilukissa68 opened 1 day ago
0
Refactor SPI-M & add build-time checks

#92 hegza closed 3 weeks ago
0
Improving the SPI-M

#91 hegza opened 3 weeks ago
3
Minor SPI refactors

#90 hegza closed 3 weeks ago
0
SysCtrl uDMA UART does not produce output on Renode UART analyzer

#89 hegza opened 4 weeks ago
0
Fix Rust PLIC layout for ASIC

#88 hegza opened 4 weeks ago
0
Add missing things to REPL

#87 hegza closed 1 month ago
1
Feat/sysctrl spi driver

#86 Aisha-KM closed 3 weeks ago
0
Debug experience improvements & RISC-V update

#85 hegza closed 1 month ago
0
Clean up and organize

#84 hegza closed 1 month ago
0
Cache Rust builds in CI

#83 hegza closed 1 month ago
0
Add newlib artifacts (@v0.0.1)

#82 hegza opened 1 month ago
6
feat: add the break & start hack

#81 hegza closed 1 month ago
1
Feat/dla clip handling

#80 vilukissa68 closed 4 weeks ago
0
Use of possibly deprecated "region"-field in Python peripheral in headsail.repl

#79 vilukissa68 opened 1 month ago
0
Make init_hpc as verbose as possible

#78 hegza closed 1 month ago
0
Fix SRAM addresses to match RTL

#77 vilukissa68 closed 1 month ago
0
Possibly incorrect SRAM locations & lengths

#76 hegza opened 1 month ago
5
Add SDRAM initialization to HPC

#75 vilukissa68 closed 1 month ago
1
Alloc example not building for sdram

#74 vilukissa68 closed 1 month ago
5
Fix kernel data writing to DLA in TVM order

#73 vilukissa68 closed 2 months ago
1
Add TVM compatible interface to dla-ffi

#72 vilukissa68 closed 2 months ago
1
Software support for HPC ASIC development

#71 hegza closed 2 months ago
0
Feat/tvm example

#70 vilukissa68 closed 1 month ago
2
Feat/dla vp overflow fix

#69 vilukissa68 closed 2 months ago
0
Fix highlevel example missing type annotation

#68 vilukissa68 closed 2 months ago
0
Broken test: highlevel.rs

#67 hegza closed 2 months ago
1
Add example: both UARTs

#66 hegza closed 2 months ago
0
Sanitize print/panic impls to allow switching between TLP & SysCtrl

#65 hegza closed 2 months ago
0
Refactors & fixes based on ASIC testing

#64 hegza closed 2 months ago
0
SysCtrl uDMA UART for ASIC

#63 hegza closed 3 months ago
1
Relocatable UART

#62 hegza closed 3 months ago
1
Rename bsp::uart as bsp::apb_uart

#61 hegza closed 3 months ago
1
ASIC-specific examples

#60 hegza closed 3 months ago
0
Minor fixes for the memory map test

#59 hegza closed 3 months ago
0
Add test case for DLA FFI

#58 vilukissa68 closed 3 months ago
0
Feat/dla ffi

#57 vilukissa68 closed 3 months ago
0
Fix minor issues in DLA driver

#56 hegza closed 3 months ago
2
Adds API for DLA operations

#55 vilukissa68 closed 4 months ago
2
Adds Tensors objects to DLA

#54 vilukissa68 closed 4 months ago
1
CI: memory map tests

#53 hegza opened 4 months ago
2
Switch SysCtrl architecture & fix several minor errors reported by tools

#52 hegza closed 4 months ago
0
Feat/dla high level

#51 vilukissa68 closed 4 months ago
3
Feat/bias

#50 vilukissa68 closed 4 months ago
0
Feat/padding fix

#49 vilukissa68 closed 4 months ago
0
Removes unused dla validation data files

#48 vilukissa68 closed 4 months ago
0
Feat/headsail newlib example

#47 andstepan closed 3 months ago
6
Feat/dla uart

#46 vilukissa68 closed 4 months ago
0
Moves to use riscv64 linker

#45 vilukissa68 closed 5 months ago
0
Adds support for HPC external bit in DLA

#44 vilukissa68 closed 5 months ago
0