ucb-bar chisel2-deprecated issues

ucb-bar / chisel2-deprecated

chisel.eecs.berkeley.edu

387 stars 90 forks source link

issues

Newest

Newest Most commented Recently updated Oldest Least commented Least recently updated

Change nameable to Nameable, move setName to Nameable, scope changes

#550 ucbjrl closed 8 years ago
0
Support for asynchronous resets in Verilog backend

#549 jwright6323 closed 5 years ago
2
Incorporate pr499 - don't reserve empty names.

#548 ucbjrl closed 8 years ago
0
issue warning for modules with no connected ports

#547 ucbjrl opened 8 years ago
0
Avoid java.lang.UnsupportedOperationException: empty.init when no uncommented ports - fix for #545

#546 ucbjrl closed 8 years ago
0
java.lang.UnsupportedOperationException: empty.init after e8240d2 - improve verilog code generation

#545 ucbjrl closed 8 years ago
1
Comments and slight modifications to ChiselUtil - #497

#544 ucbjrl closed 8 years ago
0
Fix misc

#543 donggyukim closed 8 years ago
0
Error checking for negative shift in shift register - pr525

#542 ucbjrl closed 8 years ago
0
Queue w/ flushable?

#541 ben-k closed 8 years ago
1
Re-introduce MuxCase / PriorityMuxi'ing of bundles

#540 SebastianBoe closed 8 years ago
0
Swapped arguments (out,n) in Vec and Mem.

#539 ccelio closed 8 years ago
1
Some documentation fix for Queue in ChiselUtil

#538 Martoni closed 8 years ago
0
Swap the type and num_elements arguments for Vecs and Mems

#537 ccelio closed 8 years ago
0
Fix tester

#536 donggyukim closed 8 years ago
0
Error message reporting strategy

#535 doughnit closed 8 years ago
1
Tester expect should have a failure message

#534 doughnit closed 8 years ago
1
Statically typed enums

#533 doughnit opened 8 years ago
0
Chisel has no unknown value

#532 doughnit opened 8 years ago
1
`Wire(new Bundle { ... })` does not compile

#531 nyuichi closed 8 years ago
0
JVM stack overflow on illegal use of wire

#530 nyuichi closed 8 years ago
2
Declaring register with default value

#529 nyuichi opened 9 years ago
0
Assertion failures don't include the path of the failing component

#528 doughnit closed 8 years ago
1
Allow for users to attach metadata to module

#527 doughnit opened 9 years ago
1
Make Chisel test benches more like software unit testing

#526 doughnit opened 9 years ago
0
Error checking for shift register

#525 da-steve101 closed 8 years ago
0
Fixed vcdMem regression introduced in v28.

#524 SebastianBoe closed 8 years ago
1
Replace overridden setName in seqMem with a working setMemName method

#523 albert-magyar closed 9 years ago
0
Images not showing up on the "Getting Started" page

#522 ben-k opened 9 years ago
2
Clock given in Module(c) argument is not always the Driver.implicitClock

#521 Martoni closed 9 years ago
2
Revert BuildInfo code due to problems when included as a submodule.

#520 ucbjrl closed 9 years ago
0
add stable arbiters

#519 wsong83 closed 8 years ago
2
Pr461

#518 ucbjrl closed 9 years ago
0
Add missing "d<" operator and Dbl() comparison tests - issue #516.

#517 ucbjrl closed 9 years ago
0
Dbl comparison operations

#516 andreaTP closed 9 years ago
1
Enable testing variable size modules

#515 andreaTP opened 9 years ago
2
separate functionalities and DSL in packages under ```Chisel```

#514 andreaTP opened 9 years ago
3
Java stack error when a io signal not driven

#513 Martoni closed 9 years ago
2
Add fix for rsh emulator which had seg fault on uninitialized values

#512 da-steve101 closed 9 years ago
1
Gitter channel

#511 andreaTP opened 9 years ago
0
LargeNumber fail on master

#510 andreaTP closed 9 years ago
13
Issue395

#509 da-steve101 closed 8 years ago
3
Clock name as argument is not set in verilog backend

#508 Martoni closed 8 years ago
8
Update Enum Doc for Scala's limit on Tuple size

#507 seldridge closed 9 years ago
0
Bits refactor

#506 da-steve101 closed 8 years ago
8
Chisel dev google group

#505 da-steve101 opened 9 years ago
1
Change nameable to Nameable, move setName to Nameable, scope changes

#504 da-steve101 closed 8 years ago
0
Documentation in manual

#503 da-steve101 opened 9 years ago
0
Bus/TriState/High Impedance node

#502 da-steve101 closed 8 years ago
1
No otherwise with switch statement ?

#501 Martoni closed 9 years ago
2

Previous Next