umd-memsys DRAMSim2 issues

umd-memsys / DRAMSim2

DRAMSim2: A cycle accurate DRAM simulator

http://www.ece.umd.edu/~blj/papers/cal10-1.pdf

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issues

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DRAMSIM2 on gem5

#81 NedasadatTaheri opened 2 years ago
0
How to generate the *.trc.gz trace files?

#80 HaFred closed 3 years ago
2
add old work

#79 rpiwangdabai closed 4 years ago
0
Does DRAMSim2 provides support for DDR4 simulation ?

#78 gkothar1 closed 4 years ago
0
Does DRAMsim2 use watermark to select between read and write?

#77 allencho1222 opened 4 years ago
0
"Total transacations for multiple channels"

#76 tks2004 opened 5 years ago
0
how to generate a physical trace file by using gpgpu-sim,thank you

#75 licaiwei397 opened 5 years ago
0
Introducing the Delay Queue

#74 rommelsv opened 6 years ago
2
Generating physical address trace of a program

#73 sarabjeetsingh007 closed 6 years ago
2
delay calculate bug!

#72 Cassiel-girl closed 6 years ago
1
what's the scheduling policy supported by DRAMSim2?

#71 Cassiel-girl closed 6 years ago
1
Power calculation in MemoryController.cpp

#70 konbick closed 6 years ago
1
Interpreting DRAMSim2 results (only 8 banks?)

#69 konbick closed 7 years ago
1
Would you be willing to share your validation flow?

#68 davidbiancolin closed 7 years ago
2
trace files fro running DRAMSim2

#67 naveen168 closed 6 years ago
6
Adapted for DDR4

#66 luyikang closed 7 years ago
0
Implementing row individual refresh rate

#65 konbick closed 7 years ago
5
TOTAL_ROW_ACCESSES exceeds assigned number

#64 shavvn opened 7 years ago
0
Command Queue Scheduling Issue when refresh_waiting is Set

#63 shavvn opened 7 years ago
1
Wiki link dead

#62 RSpliet opened 7 years ago
1
Master

#61 inciaf closed 8 years ago
2
Is data_storage branch stable

#60 kelayamatoz opened 8 years ago
1
DRAMSim2-Gem5 Average Latency

#59 inciaf opened 8 years ago
2
Meaning of ini parameters

#58 dzaragoza closed 9 years ago
3
Steps after installing DRAMSim2 on linux

#57 swanandM opened 9 years ago
1
DRAMSim2 instalation

#56 swanandM opened 9 years ago
1
running DRAMSim in trace mode and encountered an error

#55 sllu opened 9 years ago
2
Trace based Simulation

#54 zowda opened 10 years ago
1
DRAMSim: export Ini configuration getters

#53 cota closed 10 years ago
0
AddressMapping: precompute log2 values to increase performance

#52 cota closed 10 years ago
0
For dramninjas

#51 cota closed 10 years ago
0
About the ECC functionality in DRAMSim2

#50 MichaelTong closed 9 years ago
1
How to integrate DRAMSim2 with Eclipse IDE

#49 sid392 opened 10 years ago
1
Is there a mailing list to discuss DRAMSim2

#48 HarryWei closed 10 years ago
2
How to make the refresh run in ROR mode?

#47 lwj0012 closed 9 years ago
3
simulation performance

#46 wky opened 10 years ago
1
PARSEC workload

#45 ahmed-shafik opened 10 years ago
1
Question about DRAM timing equations table

#44 agdespopoulos opened 10 years ago
0
int 000::ReorderBufferEntry Aborted (core dumped)

#43 ychoijy closed 10 years ago
3
Unable to successfully run scons due to undefined reference to BIT in kvm.c

#42 varunkumhar closed 10 years ago
3
Bad Alloc

#41 ahmed-shafik opened 10 years ago
1
Interleaved memory

#40 hphphphp3 opened 10 years ago
3
Address mapping schemes

#39 ahmed-shafik opened 10 years ago
1
Generating Trace files for DRAMSim2

#38 tmm77 opened 10 years ago
0
Error in long run cycles (double free or corruption )

#37 ahmed-shafik opened 10 years ago
3
Not C++ Question...logic one

#36 ahmed-shafik opened 10 years ago
2
cannot view the data after adding to vector

#35 ahmed-shafik closed 10 years ago
1
cannot create a new Transaction object

#34 ahmed-shafik closed 10 years ago
0
Error in Inserting in 3d Transaction vector

#33 ahmed-shafik closed 11 years ago
1
DRAMSim2 Trace Mode not using all transactions

#32 sfx1999 closed 11 years ago
5