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When I implement pipecnn by DE1-SOC, only change VEC_SIZE，LANE_NUM ，CONV_GP_SIZE_X？
Does it only affect performance？parameters recommended?
Thanks a lot
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Dear bsteinsbo,
Excuse me to ask you many times, but i would like to test your application in my DE1-SoC board, but I have a little experience with linux system, I'm starting in this field, I compile…
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Must create a working VGA system on the DE1-SoC board.
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Hai @doonny , I have run inference on De1-SoC board with VEC_SIZE=8 and LANE_NUM=8 (other parameters remain unchanged).
However, the **Total kernel runtime** is 236.344 ms instead of 149.988 ms giv…
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Hello! @Dolu1990, I know you previously answered a similar question on issue #22. I running into the same error on the DE1-SOC which uses a Cyclone V chip. My confusion comes from the fact that you ha…
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Hi,
When I try to compile the dts file with dtc, I'm getting:
`FATAL ERROR: Unable to parse input tree `
Is there something I'm missing?
I'm using the command:
`dtc -O dtb -o socfpga_cyclon…
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I'm using Amaranth for university classes, where the students have access to DE1-SoC and DE2-115 boards. The board definition for DE1-SoC in `amaranth-boards` is very incomplete, and there is no defin…
tilk updated
11 months ago
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Hi @thinkoco
Could you tell me how can create De1-SoC linux image with OpenCL driver and init_opencl_.sh file? I have spent a lot of time looking for any documents about it but i couldn't find anyth…
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Jotego/@topapate has been releasing a ton of arcade cores, Double Dragon/DD2 being the latest source released (https://github.com/jotego/jtdd), cps1 source is coming soon (core is in public beta now f…
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Hello,
In CycloneVSoC-examples/FPGA-hardware/DE1-SoC/FPGA_DMA/ghrd_top.v, line 335:
.axi_signals_aruser (pio_controlled_axi_signals[ARPROT_BASE+: ARPROT_SIZE]),
.axi_signals_…