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- [x] fixed https://github.com/sinara-hw/Kasli-SOC/issues/68
- [x] fixed https://github.com/sinara-hw/Kasli-SOC/issues/67
- [ ] added 24AA025E48T-I/OT and 24AA025E48-I/SN on separate I2C bus https:…
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Basic idea is to create something low-level, like LLVM Bitcode or WebAssembly, to create the HDL compilers emit the code in this format, which will be fed to the routers/synthesizers after. This will …
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This is a mirror to the plan I laid out in the Discord #collaborate channel.
Goal:
- Be within 15% of the fastest CPU MSMs.
Out-of-scope:
- Rayon performance/multithreading performance, I have…
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I got involved in new project at the WUT.
We will build wideband MIMO SDR. Probably on the new RFSoC that:
- are pin compatible with ZU25
- offer 8x 10G DACs and 8x 5G ADCs
You won't find any i…
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Hi guys (@jtikalsky @mathiasblake @ekfriis @tsarangi @dabelknap),
I spent a few hours debugging this today and have come up with no solutions. I am following twiki instructions and previous steps for …
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This is a follow-up to my quest to do efficient cross-ISA modular arithmetic for cryptography and finding a workaround to #102062
Ignoring the loads/stores, the following LLVM IR is optimized into …
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## Motivation
The motivation for this issue is the demo program `c/test_programs/demo_sprite_balls.c`. In this program a large number of balls move about and collide, and calculating the new veloci…
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While adjusting some paths in the makefile is almost expected! I did have to modify the source to get it to compile at around line 824 of ujprog.c
//#ifdef __linux__
// usb_rese…
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Summarizing the broad design points regarding revD in one place:
1. Four I/O banks (ABCD) instead of two (AB)
2. Placement of AB and CD so that addons developed for revC work on revD side by side …