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| | |
|--------------------|----|
| Bugzilla Link | [PR43388](https://bugs.llvm.org/show_bug.cgi?id=43388) |
| Status | RESOLVED FIXED |
| Importance | P…
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my environment description:
- QEMU：5.1.0 built from source
- riscv-gnu-toolchain: built from source, just pull from github several days ago and should be very latest, commit id: 7f1f4ab5b0e04f267a19…
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With the new [inline assembly](https://github.com/Amanieu/rfcs/blob/inline-asm/text/0000-inline-asm.md) it would be nice to be able to read/write from a [RISC-V CSR](https://github.com/riscv/riscv…
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| | |
|--------------------|----|
| Bugzilla Link | [PR46378](https://bugs.llvm.org/show_bug.cgi?id=46378) |
| Status | RESOLVED FIXED |
| Importance | P…
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Hello,
I am trying to add my custom bare-metal test to cosim. But, if I use asm instructions in my test function, the 'make' command is throwing the following error.
```
$ make
/usr/bin/g++ -D…
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We are writing directed self-checking tests for the pulp extensions and started with the bit manipulation instructions. We are finding numerous cases in which the RTL does not match the documentation…
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### Code
```Rust
// Compile with target riscv64imac-unknown-none-elf
#![feature(asm)]
#![no_std]
#[inline]
pub fn sbi_putchar(byte: u8) {
unsafe { asm!("ecall", in("a0") byte, in("a7…
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Hello @rbertran,
Can you provide some info on how to control the branch taken / not-taken patterns. I see that there is an "InitializeBranchDecorator" pass which deals with T / NT but I'm not sure …
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Similar to handcoded assembly test support, it will be great to allow user to write C test as a supplement approach to test the processor. Example:
```yaml
- test: riscv_directed_c_test
descri…
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**Describe the bug**
I managed to install =media-gfx/freecad-0.18.3. When I ran `/usr/bin/freecad` a window tried to appear but then Freecad crashed.
Terminal output is:
```/usr/bin/freecad
Free…