-
### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard)
- [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues)
- […
-
This issue is a reminder to regularly review code and
- push tested code to upstream projects where possible.
- separate i) system requirements (readily available from upstream), ii) customization …
-
Hi,
I am working on using the Vitis AI library with a custom Yolov4 model.
I have followed the steps of this tutorial (convert Darknet to TensorFlow, freeze, quantize, compile) : https://github.…
-
Hello everyone,
For a project, I need to use SGMII as a communication interface.
As a beginner, I'm currently searching for a cheap FGPA board able to support SGMII synthesis.
I was thinking u…
-
I used "efsend_pio" to send 32 udp packets. It took about 70us. Now I don’t know where the problem occurred. Can you give me a test data?
OS: centos7.6
CPU:i9-9980XE
NIC:X2522
-
The SD card cannot start after burning the zcu102 onboard image given in vitis-ai. I confirmed that I have set the SD card startup mode, and I tried the 2023.1 image burning given by the wiki official…
-
Hi,
thanks for this super nice project! I have a design that extends your VCU118 1g example. It worked perfectly for over one year now (on a VCU118 board). Last month, I bought 5 new VCU118 boards.…
-
Used security library I am trying to get the following benchmark results replication on the U250 card.
[https://xilinx.github.io/Vitis_Libraries/security/2020.2/benchmark/result.html#aes256cbcencry…
-
I wonder what the chances are for dtbocfg making its way into upstream. As far as I understand things, there currently doesn't seem to be a way to load PL with what's in the plain vanilla kernel, and …
-
Hi,
I am really new to the FPGA stuff and tried to setup a project using OR1200.
I like to start with my board from XESS:
http://www.xess.com/shop/product/xula2-lx25/
https://github.com/xesscorp/XuL…