-
The VPU basically does a DMA operation to read the frame source and writes the desired output.
Since these frames will come from a video player invoked by the user, in the first place, we need to :…
-
Shim DMA, Mem DMA and Tile DMA descriptors have fields with different lengths.
e.g. the buffer_length field is 32-bits in AIE2 for shim tiles, 17-bits for mem tiles and 14-bits for compute tiles.
-
I was not sure where to ask you questions, as I don't have your contact details: This project is just a gem! I stumbled across this series of projects after more or less giving up on trying to send da…
-
Hi,
Is there a plan to optimize performance on the MCU host? I have ported esp-hosted to Azure RTOS NetX DUO based on your reference implementation but performance is extremely low (1Mbps). It mak…
-
Would be nice with an example application of DMA ping-pong (in which the DMA alternates between two buffers so that one can be written to while the other is being processed).
-
that p3 64x32 and have scan 1/32s
I have some problems using this panel
1. p…
-
## What
As stated in #2, we are currently using a simple bitmap allocator.
This allocator, although very simple to implement, is not the most optimal and should, in term, be replace by a buddy a…
-
Hi.
I'm writing a DMA driver for my hardware. I don't know about parameter was set on FPGA. Your code works well in user-space. I tried you your code in my driver, but it cannot run `get_user_pages_f…
-
This cache invalidation before DMA transfer ensures that during the DMA transfer the cache has no dirty lines associated to the buffer,
which could be written back to memory.
See
https://deve…
-
## Introduction
On the ARM-M7 core-based stm32 MCU, when the L1-Cache memory is enabled, the system needs to "ensure data coherency between the core and the main memory when dealing with shared dat…