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# Question
Is the DAC monitor compatible with DACs that use the general AD53xx driver?
## Category: moninj
## Description
We use AD5370 DACs in our experiment. In our recent upgrade…
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Could anyone give me some intuition about the DMA, like the address of the device memory it is transferring from? I want to transfer data between the main memory of my development board(KC705) and the…
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the kc705 board can not function and it is believed that the memory bar is broken. However, we change a new 2G memory but it still can not be connect. @sbourdeauducq
the above is new and below is …
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How hard would it be able to get this project running on VC707 boards?
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# Bug Report
## Issue Details
This bug is seen plaguing the build [#75623](https://nixbld.m-labs.hk/build/75623) and build [#73252](https://nixbld.m-labs.hk/build/73252) previously, and it …
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Currently the the external clock selection on ARTIQ boards (KC705, ZC706, Kasli, Kasli-SoC) is inconsistent, limited in features, and difficult to use with firmware recompilations and reflashing requi…
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Constraint files included in the repository for example/evaluation board designs do not qdopt a standard structure nor have a standard clock constraint policy (e.g. naming convention, ipbus vs payloa…
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# Bug Report
## One-Line Summary
When submitting a few thousand commands using DMA, kasli crashes.
## Issue Details
I'm trying to program a few thousand commands using DMA. I noticed t…
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Thank you for creating the project. The bitstream generation flow was extremely convenient for mapping a RISC-V SoC to FPGA.
I was wondering how much effort would be needed to remap this flow (or a…
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I have purchased 5 of the QMTech boards for work purposes (arriving later this week), so should be able to use one to experiment with the open source flow. I also have (limited) access to the Genesy…