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### Describe the feature
Give access for the S3 bucket to have it's name automatically be known during runtime, if `bucketName` was explicitly provided by the end user. Currently, a token is shown in…
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It would be great to have an example project on how to use bazel_rules_hdl for OpenROAD and asap7.
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Hi @hbb1,
I tested your model on the BMVS dataset. Unfortunately, I wasn't able to get good results. I used the code provided in #5 and #44 to convert IDR format data to COLMAP format. I am not sur…
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The core generation for FPGA fails due to:
- [x] Memory initialization is generated only inside the ifndef SYNTHESIS block #4752 - -> Fixed by https://github.com/llvm/circt/issues/4752#issuecommen…
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For synthesis, I'd like to suggest a feature to generate multiple types of annotation–bounding box, instance/class segmentation, etc.–per image at once. If I've understood correctly, the current versi…
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Hi, i am trying Yosys compilation for bitstream following https://fabulous.readthedocs.io/en/latest/FPGA-to-bitstream/Yosys%20compilation.html
with the default Yosys TCL script`$FAB_ROOT/nextpnr/fab…
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Hello 😀,
I'd like to suggest adding a text-to-singing voice synthesis feature.
https://github.com/topics/singing-voice-synthesis
Thank you -_-
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**Is your feature request related to a use case or problem? Please describe.**
One of the promising gatesets for fault tolerant regime is the Clifford + T gateset, where executing T gates is signific…
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In my speech synthesis system built from Merlin toolkit, it take long time to generate speech from text. Most of the time used by World Vocoder and DNN generation module. So, to improve time delay, I …
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Hi,
I'm new in this forum so apologies if I missed the information.
I was surprised to see PSL functions (live prev() in particular) supported for _synthesis_ in GHDL but not for simulation.
They …