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Kinda an edge case, but I'm also not sure how friendly Vivado's linux installer would work with WSL2...
calling `python3 -m litex_boards.targets.colorlight_i9plus --build --toolchain=vivado` in a…
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Hello to all,
I am trying to implement the cv32e40s in Litex.
The Litex hub "pythondata-cpu-cv32e40s" has already been done last year:
https://github.com/litex-hub/pythondata-cpu-cv32e40s
I fo…
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Hi @enjoy-digital, may I ask what's the current support status of ethernet on the Trion t120f576 dev kit?
Is it supposed to be working, or what needs to be done to make it work?
Since there seems…
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CFU-Playground currently supports Arty 35T and Nexys Video boards. The difference between them is very small, but the current setup requires duplication of at least a couple of files in the soc/ dir…
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An attempt to build environment from recent symbiflow-arch-defs ends with package not found error from conda:
```
➜ git rev-parse HEAD
45cc311a41dd6dfd2fcad7d736f1b246587e937f
➜ symbiflow-arch…
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`build/icesugar_pro/icesugar_pro.dts:86.13-130.11: ERROR (phandle_references): /soc: Reference to non-existent node or label "intc0"`
`ERROR: Input tree has errors, aborting (use -f to force output…
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Hello,
I'm attempting to use litex_sim to debug an application running on VexRiscv. I've been using the wiki pages: [Use-GDB-with-VexRiscv-CPU](https://github.com/enjoy-digital/litex/wiki/Use-GDB-w…
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I'm trying to use VexRiscv with Zephyr, but it generates an illegal instruction exception when trying to call the z_arch_irq_enable function. I could debug it, and this is the instruction which caused…
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I've managed to add a frame buffer to sipeed_tang_20k so far, I'd like to set up DMA to reduce CPU pressure, I refer to the linux-on-litex-vexriscv project to add coherent DMA to the cpu, but this doe…
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There are several pins that are missing from some devices such as `CABGA381`, namely Y11, Y12, W4, W5, Y5, and Y6, all of which are used for PCIe in e.g. https://github.com/enjoy-digital/litex/blob/ma…