-
I can't find a definate answer to this. Does the flash floppy OSD input on pin 18 work on the 12bit board? Or does it only work on the copperdragon board for the Amiga?
I've looked at the 12bit boa…
-
I'm trying to download Xilinx_ISE_DS_Lin_14.7_1015_1.tar file from xilinx website, but the download doesn't start. I searched for the installer outside xilinx website but I could just find the install…
-
XEM6010-LX150 and XEM6310-LX150 should both be compatible with the footprint, and they all use the same chip (XC6S). The LX150 has more RAM and slices than LX45, while the XEM6310 supports USB 3.0 (XE…
-
I work with a legacy project and on some entities one of the generics is named "DEFAULT". This gives the following error message:
> Expected 'signal', 'constant', 'variable', '{identifier}', 'file'…
-
Hi,
first I express my gratitude for this project and all who have contributed to it.
I have an FPGA board with Spartan 6 on it and I want to implement this SoC on my board. I followed the steps o…
-
Hello !!
I followed README and executed command but it's having error while building bscan_spi_xc6slx9t.bit but other bit files are generating properly. Also I tried finding this in master and thei…
Dv-p updated
6 months ago
-
https://pastebin.com/qvymcNWi
In the example an `IBUFDS` resource is created and requested, with particular Attributes:
```python
Resource("IBUFDS", 0,
DiffPairs("48", "46", conn…
-
I have a Xilinx Platform Cable USB, which I would like to use in Xilinx Web ISE on Ubuntu through WSL2. However, sadly `usbipd wsl list` doesn't list this device, and so I have no way to attach it. Af…
-
Hi,
I am creating this issue to discuss questions related to testing the double trouble after its successful assembly at Sierra Circuits.
I am currently at testing stage 1 that is powering up th…
-
How to transfer xdl to dcp file?