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Hi, I'm a student at USC, and I'm working with a professor on a project where we were hoping to utilize OpenRAM. I see that you have guidelines for what might be required to port OpenRAM to a new tech…
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this isn't a problem with the library itself rather than a misunderstanding of my part.
I'm doing a project which has 3 Adafruit_ST7789 screens. I've been trying to create a generic callback instea…
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### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard)
- [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues)
- [X] Y…
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nspice is needed for analog simulation of the spice models in the skywater-pdk (and for OpenRAM characterization).
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It would be good if there was a documentation page which had a list of papers which use OpenRAM or similar.
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I encountered the error first while I was building OpenRAM. If I run `make pdk` command in [OpenRAM repo](https://github.com/VLSIDA/OpenRAM) following error shows up.
```
...
make SHARED_PDKS_PATH=…
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Hi,
I'm interested in what analytical model is used in OpenRAM for estimating latency and area of each memory component. I have checked the paper but it is not there. Is there any document, published…
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Wishbone is listed as single port only and a WIP.
https://github.com/VLSIDA/openram_testchip2#wishbone-mode-wip
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**OS:** Ubuntu 20.04.03
Docker version 20.10.21, build baeda1f
**Steps Followed:**
```
git clone https://github.com/VLSIDA/OpenRAM
cd OpenRAM/docker
make build
```
The error:
```bash
Removin…
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