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A few changes are needed for successful synthesis by the legacy Xilinx ISE toolchain:
- xst incorrectly implements the register file with ENABLE_REGS_DUALPORT = 1, but ENABLE_REGS_DUALPORT = 0 work…
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Why does the driver read the user BAR at address 0x2000 0x3000?!
It shouldn't even try to access the user BAR at all. It breaks the whole Xilinx/AMD AXI interconnect since these addresses aren't mapp…
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It is possible to boot the images built for Xilinx ZCU102 hardware also in a Xilinx Qemu.
In this task the systems WG CI should be enhanced to boot also the qemu.
This means we need to prepare the…
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As enabling general AIE configuration through control packets will be a heavy lift, I intend to approach this in phases:
1. As an initial POC, use control packets to program shim DMAs.
2. Use cont…
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## USB no response after cable plug in
- change to another usb port (back port on mother board is the best if PC)
## normal driver status
 firmware/program to the ibex-demo-system. After several trial, I find that if the program file is smaller than 9408 bytes as shown below (9404B), it wi…
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Hi everyone,I'm trying to boot linux on vcu108 dev board,The 108 is almost the same as 118.But the system stuck at "copying block 0 of 1 blocks (0 %)"
These are something I have already done for tran…
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I've been trying to simulate my design that includes Xilinx Aurora 8B/10B core. I find the alternatives (ModelSim Started, Xilinx XSIM) either very slow or cumbersome to use in script mode, so I'm try…
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`terminate called after throwing an instance of 'nextpnr_xilinx::assertion_failure'
what(): Assertion failure: unsupported FF type (/home/jrsa/src/nextpnr-xilinx/xilinx/fasm.cc:536)`
The FF typ…
jrsa updated
10 months ago
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**Description**
After compiling ALL Xilinx libraries I discovered that a lot of in the XIlinx libraries available components are not compiled in the GHDL libraries.
Maybe I'm doing something wrong? …