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hey! i was curious how you generated your vcd files, particularly which compiler (iverilog, verilator), which distribution you're on (linux, mac, windows), and which version of iverilog/verilator you'…
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Cuando llega una entrada que por el tema puede ser delicado, que a la hora de Admitirlo el vcd y/o el sd puedan cambiar la visibilidad a "directores", "vicarios",.. etc.
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Hello!
I feel like I'm not the first to ask, but I haven't found anything regarding this as an open issue so I'll ask nonetheless.
ChiselSim. Waveforms. Yes or no?
Can I write chisel/scala …
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I'm currently refactoring the VCD loader and came across this check for VCD files that were generated by Icarus: https://github.com/gtkwave/gtkwave/blob/ab54185373dd77b7f498d7bd35f5c310d2435a24/src/vc…
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I would like to know if gtkwave can provide **waveform comparison** functions, such as in an interface to show the waveforms of two vcd files in different colors at the same time, and in the instant…
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At the moment names that include the hierarchy delimiter are handled differently in the VCD and FST loaders.
This is my test VCD file:
```vcd
$scope module module.with.dot $end
$var wire 1 a wir…
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### Describe the bug
Based on https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/pull/2113
1. extract [mock-array-power.tar.gz](https://github.com/user-attachments/files/16128226/mock…
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#### Community Note
* Please vote on this issue by adding a 👍 [reaction](https://blog.github.com/2016-03-10-add-reactions-to-pull-requests-issues-and-comments/) to the original issue to help the co…
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Self-contained but not quite minimal reproducer:
[repro.zip](https://github.com/user-attachments/files/15895758/repro.zip)
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Hello,
When creating Internel Disks the order of creation seems to be random and it cannot be ensured that the order of disks happens in as defined in the TF files.
Is it somehow possible to ensur…
C-F-A updated
17 hours ago